MVBLM7_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
-sbc8349_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
+sbc8349_config \
+sbc8349_PCI_33_config \
+sbc8349_PCI_66_config: unconfig
+ @mkdir -p $(obj)include
+ @if [ "$(findstring _PCI_,$@)" ] ; then \
+ $(XECHO) -n "... PCI HOST at " ; \
+ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
+ fi ; \
+ if [ "$(findstring _33_,$@)" ] ; then \
+ $(XECHO) -n "33MHz... " ; \
+ echo "#define PCI_33M" >>$(obj)include/config.h ; \
+ fi ; \
+ if [ "$(findstring _66_,$@)" ] ; then \
+ $(XECHO) -n "66MHz... " ; \
+ echo "#define PCI_66M" >>$(obj)include/config.h ; \
+ fi ;
+ @$(MKCONFIG) -a sbc8349 ppc mpc83xx sbc8349
SIMPC8313_LP_config \
SIMPC8313_SP_config: unconfig
PCI:
====
-This board and U-Boot have been tested with PCI built in, on a SBC8349
-and confirmed that the "pci" command showed the intel e1000 that was
-present in the PCI slot. Note that if a 33MHz 32bit card is inserted
-in the slot, then the whole board will clock down to a 33MHz base
-clock instead of the default 66MHz. This will change the baud clocks
-and mess up your serial console output. If you want to use a 33MHz PCI
-card, then you should build a U-Boot with #undef PCI_66M in the
-include/configs/sbc8349.h and store this to flash prior to powering down
-the board and inserting the 33MHz PCI card.
-
-By default PCI support is disabled to better support very early
-revision MPC834x chips with possible PCI issues. Also PCI support is
-untested on the sbc8347 variants at this point in time.
-
-
- Paul Gortmaker, 01/2007
+There are three configuration choices:
+ sbc8349_config
+ sbc8349_PCI_33_config
+ sbc8349_PCI_66_config
+
+The 1st does not enable CONFIG_PCI, and assumes that the PCI slot
+will be left empty (M66EN high), and so the board will operate with
+a base clock of 66MHz. Note that you need both PCI enabled in u-boot
+and linux in order to have functional PCI under linux. The only
+reason for choosing to not enable PCI would be if you had a very
+early (rev 1.0) CPU with possible PCI issues.
+
+The second enables PCI support and builds for a 33MHz clock rate. Note
+that if a 33MHz 32bit card is inserted in the slot, then the whole board
+will clock down to a 33MHz base clock instead of the default 66MHz. This
+will change the baud clocks and mess up your serial console output if you
+were previously running at 66MHz. If you want to use a 33MHz PCI card,
+then you should build a U-Boot with sbc8349_PCI_33_config and store this
+to flash prior to powering down the board and inserting the 33MHz PCI
+card.
+
+The third option builds PCI support in, and leaves the clocking at the
+default 66MHz. This has been tested with an intel PCI-X e1000 card.
+This is also the appropriate choice for people with a recent (non 1.0)
+CPU who currently have the PCI slot physically empty, but intend to
+possibly add a PCI-X card at a later date.
+
+ => pci
+ Scanning PCI devices on bus 0
+ BusDevFun VendorId DeviceId Device Class Sub-Class
+ _____________________________________________________________
+ 00.00.00 0x1957 0x0080 Processor 0x20
+ 00.11.00 0x8086 0x1026 Network controller 0x00
+ =>
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
#define CONFIG_FDTFILE mpc8313erdb.dtb
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#define CONFIG_BAUDRATE 115200
"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"console=ttyS0\0" \
"setbootargs=setenv bootargs " \
#define CONFIG_BAUDRATE 115200
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
"consoledev=ttyS0\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=ramfs.83xx\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=mpc8315erdb.dtb\0" \
"usb_phy_type=utmi\0" \
""
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
#define CONFIG_FDTFILE mpc832x_rdb.dtb
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#define CONFIG_BAUDRATE 115200
"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=" MK_STR(CONFIG_RAMDISKFILE) "\0" \
#define CONFIG_BAUDRATE 115200
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
"consoledev=ttyS0\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=ramfs.83xx\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=mpc832x_mds.dtb\0" \
""
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_GATEWAYIP 192.168.1.1
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
"update=protect off fe000000 fe03ffff; " \
"era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0" \
"upd=run load update\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=mpc8349emds.dtb\0" \
""
#define CONFIG_BAUDRATE 115200
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
"consoledev=ttyS0\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=ramfs.83xx\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=mpc836x_mds.dtb\0" \
""
#define CONFIG_BAUDRATE 115200
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
"consoledev=ttyS0\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=ramfs.83xx\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=mpc8379_mds.dtb\0" \
""
/* 0x3937d322 */
#define CONFIG_SYS_DDR_TIMING_2 0x02984cc8
-#define CONFIG_SYS_DDR_INTERVAL ((1545 << SDRAM_INTERVAL_REFINT_SHIFT) \
- | (256 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
+#define CONFIG_SYS_DDR_INTERVAL ((1024 << SDRAM_INTERVAL_REFINT_SHIFT) \
+ | (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
/* 0x06090100 */
#if defined(CONFIG_DDR_2T_TIMING)
/* 0x43000000 */
#endif
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */
-#define CONFIG_SYS_DDR_MODE ((0x0440 << SDRAM_MODE_ESD_SHIFT) \
+#define CONFIG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \
| (0x0442 << SDRAM_MODE_SD_SHIFT))
/* 0x04400442 */ /* DDR400 */
#define CONFIG_SYS_DDR_MODE2 0x00000000
#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
#define CONFIG_FDTFILE mpc8379_rdb.dtb
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#define CONFIG_BAUDRATE 115200
"cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
"protect on " MK_STR(TEXT_BASE) " +$filesize; " \
"cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
"ramdiskaddr=1000000\0" \
"ramdiskfile=" MK_STR(CONFIG_RAMDISKFILE) "\0" \
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
/* PCI1 host bridge */
-#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
+#define CONFIG_SYS_PCI1_MEM_BASE 0x90000000
#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */
#define CONFIG_SYS_PCI1_MMIO_BASE (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE)
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */
-#undef CONFIG_PCI
/* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
-#define PCI_66M
-#ifdef PCI_66M
-#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
-#else
+/*
+ * The default if PCI isn't enabled, or if no PCI clk setting is given
+ * is 66MHz; this is what the board defaults to when the PCI slot is
+ * physically empty. The board will automatically (i.e w/o jumpers)
+ * clock down to 33MHz if you insert a 33MHz PCI card.
+ */
+#ifdef PCI_33M
#define CONFIG_83XX_CLKIN 33000000 /* in Hz */
+#else /* 66M */
+#define CONFIG_83XX_CLKIN 66000000 /* in Hz */
#endif
#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef PCI_66M
-#define CONFIG_SYS_CLK_FREQ 66000000
-#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
-#else
+#ifdef PCI_33M
#define CONFIG_SYS_CLK_FREQ 33000000
#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1
+#else /* 66M */
+#define CONFIG_SYS_CLK_FREQ 66000000
+#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1
#endif
#endif
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_GATEWAYIP 192.168.1.1
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_LOADADDR 500000 /* default location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
"update=protect off ff800000 ff83ffff; " \
"era ff800000 ff83ffff; cp.b 100000 ff800000 ${filesize}\0" \
"upd=run load update\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=sbc8349.dtb\0" \
""
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase TO (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO (ms) */
-#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_ROOTPATH /tftpboot/rootfs
#define CONFIG_BOOTFILE uImage
-#define CONFIG_LOADADDR 500000 /* def location for tftp and bootm */
+#define CONFIG_LOADADDR 800000 /* def location for tftp and bootm */
#define CONFIG_BOOTDELAY 6 /* -1 disables auto-boot */
#undef CONFIG_BOOTARGS /* boot command will set bootargs */
"update=protect off fff00000 fff3ffff; " \
"era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
"upd=run load update\0" \
- "fdtaddr=400000\0" \
+ "fdtaddr=780000\0" \
"fdtfile=vme8349.dtb\0" \
""
#define CSCONFIG_EN 0x80000000
#define CSCONFIG_AP 0x00800000
#define CSCONFIG_ODT_WR_ACS 0x00010000
+#if defined(CONFIG_MPC832x)
+#define CSCONFIG_ODT_WR_CFG 0x00040000
+#endif
#define CSCONFIG_BANK_BIT_3 0x00004000
#define CSCONFIG_ROW_BIT 0x00000700
#define CSCONFIG_ROW_BIT_12 0x00000000
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