esd PCI405 updated.

diff --git a/board/esd/pci405/Makefile b/board/esd/pci405/Makefile
index 39d2feceb422d6fc6b586a0eed4085da53497cf8..62d7bf91dd777a0932cbce28a7b8bddf5e0de9f3 100644 (file)
--- a/board/esd/pci405/Makefile
+++ b/board/esd/pci405/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB    = lib$(BOARD).a
 
-OBJS   = $(BOARD).o flash.o
+OBJS   = $(BOARD).o flash.o cmd_pci405.o
 
 $(LIB):        $(OBJS) $(SOBJS)
        $(AR) crv $@ $^

diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
new file mode 100644 (file)
index 0000000..da1a501
--- /dev/null
+++ b/board/esd/pci405/cmd_pci405.c
@@ -0,0 +1,230 @@
+/*
+ * (C) Copyright 2002
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <net.h>
+#include <asm/io.h>
+#include <pci.h>
+#include <405gp_pci.h>
+#include <cmd_bsp.h>
+
+#include "pci405.h"
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+
+extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
+
+#if 0 /* test-only */
+#include "../common/fpga.c"
+void error_print(void)
+{
+       int i;
+       volatile unsigned char *ptr;
+       volatile unsigned long *ptr2;
+       
+       printf("\n 2nd SJA1000:\n");
+       ptr = 0xf0000100;
+       for (i=0; i<0x20; i++) {
+               printf("%02x ", *ptr++);
+       }
+
+       ptr2 = 0xf0400008;
+       printf("\nTimestamp = %x\n", *ptr2);
+       udelay(1000);
+       printf("Timestamp = %x\n", *ptr2);
+       udelay(1000);
+       printf("Timestamp = %x\n", *ptr2);
+
+#if 0 /* test-only */
+       /*
+        * Reset FPGA via FPGA_DATA pin
+        */
+       printf("Resetting FPGA...\n");
+       SET_FPGA(FPGA_PRG | FPGA_CLK);
+       udelay(1000); /* wait 1ms */
+       SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+       udelay(1000); /* wait 1ms */
+
+       do_loadpci(NULL, 0,0, NULL);
+#endif
+}
+
+void read_loop(void)
+{
+       int i;
+       volatile unsigned char *ptr;
+       volatile unsigned char val;
+       volatile unsigned long *ptr2;
+
+       printf("\nread loop on 1st sja1000...");
+       while (1) {
+               ptr = 0xf0000000;
+/*             printf("\n1st SJA1000:\n");*/
+               for (i=0; i<0x20; i++) {
+                       i = i;
+                       val = *ptr++;
+/*                     printf("%02x ", val);*/
+               }
+
+               /* Abort if ctrl-c was pressed */
+               if (ctrlc()) {
+                       puts("\nAbort\n");
+                       return 0;
+               }
+       }
+}
+#endif
+/*
+ * Command loadpci: wait for signal from host and boot image.
+ */
+int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       unsigned int *ptr = 0;
+       int count = 0;
+       int count2 = 0;
+       int status;
+       int i;
+       char addr[16];
+       char str[] = "\\|/-";
+       char *local_args[2];
+
+#if 0 /* test-only */
+       puts("\nStarting sja1000 test...");
+       {
+               int count;
+               volatile unsigned char *ptr;
+               volatile unsigned char val;
+               volatile unsigned char val2;
+
+#if 1 /* write test */
+               ptr = 0xf0000014;
+               for (i=1; i<11; i++)
+                       *ptr++ = i;
+#endif
+               
+               count = 0;
+               while (1) {
+                       count++;
+#if 0 /* write test */
+                       ptr = 0xf0000014;
+                       for (i=1; i<11; i++)
+                               *ptr++ = i;
+#endif
+#if 1 /* read test */
+                       ptr = 0xf0000014;
+                       for (i=1; i<11; i++) {
+                               val = *ptr++;
+#if 1
+                               if (val != i) {
+                                       ptr = 0xf0000100;
+                                       val = *ptr; /* trigger las */
+
+                                       ptr = 0xf0000014;
+                                       val2 = *ptr;
+
+                                       printf("\nERROR: count=%d: soll=%x ist=%x -> staring read loop on 1st sja1000...\n",    count, i, val);
+
+                                       printf("soll=%x ist=%x -> staring read loop on 1st sja1000...\n", 1, val2);
+
+                                       return 0; /* test-only */
+                                       udelay(1000);
+                                       error_print();
+                                       read_loop();
+                                       return 0;
+                               }
+#endif
+                       }
+#endif
+
+                       /* Abort if ctrl-c was pressed */
+                       if (ctrlc()) {
+                               puts("\nAbort\n");
+                               return 0;
+                       }
+
+                       if (!(count % 100000)) {
+                               printf(".");
+                       }
+               }
+       }
+#endif
+       /*
+        * Mark sync address
+        */
+       ptr = 0;
+       *ptr = 0xffffffff;
+       puts("\nWaiting for image from pci host -");
+
+       /*
+        * Wait for host to write the start address
+        */
+       while (*ptr == 0xffffffff) {
+               count++;
+               if (!(count % 100)) {
+                       count2++;
+                       putc(0x08); /* backspace */
+                       putc(str[count2 % 4]);
+               }
+
+               /* Abort if ctrl-c was pressed */
+               if (ctrlc()) {
+                       puts("\nAbort\n");
+                       return 0;
+               }
+
+               udelay(1000);
+       }
+
+       if (*ptr == PCI_RECONFIG_MAGIC) {
+               /*
+                * Save own pci configuration in PRAM
+                */
+               memset((char *)PCI_REGS_ADDR, 0, PCI_REGS_LEN);
+               ptr = (unsigned int *)PCI_REGS_ADDR + 1;
+               for (i=0; i<0x40; i+=4) {
+                       pci_read_config_dword(PCIDEVID_405GP, i, ptr++);
+               }
+               ptr = (unsigned int *)PCI_REGS_ADDR;
+               *ptr = crc32(0, (char *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4);
+
+               printf("\nStoring PCI Configuration Regs...\n");
+       } else {
+               sprintf(addr, "%08x", *ptr);
+               
+               /*
+                * Boot image
+                */
+               printf("\nBooting image at addr 0x%s ...\n", addr);
+               setenv("loadaddr", addr);
+               
+               local_args[0] = argv[0];
+               local_args[1] = NULL;
+               status = do_bootm (cmdtp, 0, 1, local_args);
+       }
+
+       return 0;
+}
+
+#endif

diff --git a/board/esd/pci405/fpgadata.c b/board/esd/pci405/fpgadata.c
index 01f2c867d9cb8d8d0c3a35185be1a00061c65a12..41bbd6b6350b9acec16d019a4faa272b2a43b2e9 100644 (file)
--- a/board/esd/pci405/fpgadata.c
+++ b/board/esd/pci405/fpgadata.c
@@ -1,743 +1,749 @@
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+  0x44,0x85,0xff,0x09,0xb5,0xdc,0xe0,0x75,0x0e,0xeb,0xaa,0x15,0xaa,0x17,0x2d,0x53,
+  0x2b,0x65,0x69,0xa0,0x55,0x80,0x54,0xfa,0x5e,0x59,0x72,0xda,0xc2,0x9e,0x3f,0xef,
+  0xfb,0x52,0xec,0x9a,0x8d,0x55,0x3f,0x7e,0x2c,0xa5,0x7d,0x29,0xf6,0xf9,0x8d,0x55,
+  0xcc,0xf5,0xcc,0xf9,0xf8,0xa8,0xa4,0x0a,0x59,0x7c,0x84,0xfe,0x4c,0xa7,0x8d,0x4a,
+  0x73,0x2a,0x42,0xd2,0x12,0xa1,0xa2,0x73,0x55,0xa6,0x22,0xd4,0x81,0x86,0xcb,0xcf,
+  0x3e,0x99,0xde,0x27,0x7d,0x4e,0xa8,0x52,0x17,0xa5,0x2b,0xee,0x93,0xaa,0xd0,0x70,
+  0xee,0xab,0x4e,0x52,0xb5,0x2d,0x58,0x7d,0xc4,0x7c,0x7b,0x42,0x79,0xcc,0xb9,0xcd,
+  0xeb,0x21,0xad,0x90,0x83,0x5b,0x64,0x34,0x98,0x9a,0xc3,0x9d,0xcd,0x69,0xf3,0x8b,
+  0xf7,0x42,0x87,0xf6,0xf0,0x1c,0x69,0x99,0x78,0xaf,0x70,0x5a,0x9b,0x13,0xf3,0x3b,
+  0x6d,0xd4,0xb3,0x56,0x78,0x80,0x7d,0x41,0xc7,0x2c,0x34,0xbe,0x85,0x98,0x65,0xb7,
+  0x89,0x08,0x2a,0x72,0x4c,0xf2,0x0b,0xdc,0xa8,0x88,0x4b,0xfe,0x0a,0xe7,0xbe,0xc6,
+  0xc9,0xe5,0x93,0xbf,0x98,0x7c,0x7f,0xf2,0x23,0xdb,0x80,0x3f,0xea,0x4a,0xfc,0x7a,
+  0xf9,0xe5,0xfe,0x97,0xf3,0x7b,0xbe,0x93,0xf8,0x95,0x6f,0x3e,0x37,0xd6,0xb8,0x9e,
+  0xd9,0xb8,0x7c,0x72,0xea,0xdc,0x81,0xc1,0x8f,0x1a,0x1b,0x96,0x9d,0xe4,0xc6,0xbb,
+  0xae,0xb6,0x50,0xea,0x4c,0xe5,0x9c,0x8e,0x8d,0xdf,0xbe,0x3d,0x94,0x3a,0x3a,0x75,
+  0x3f,0x1a,0x4e,0x9b,0xd4,0xfa,0xf0,0xa2,0x6d,0x2d,0x37,0x07,0x4b,0x8f,0x90,0x16,
+  0x75,0x9b,0x7c,0xb3,0x74,0x9d,0xd3,0x07,0x69,0xf3,0xc3,0xc2,0xeb,0x1c,0xde,0x8f,
+  0x7a,0x1e,0x16,0x38,0xce,0x4f,0x77,0xda,0xc8,0x22,0x13,0xde,0xd7,0xd9,0x38,0xef,
+  0xdc,0x97,0xab,0x86,0x90,0x5a,0x22,0xbb,0xfe,0xb0,0x8a,0x33,0x66,0xcd,0x6b,0x61,
+  0x1a,0xbb,0x33,0x52,0x51,0x90,0xd6,0x0a,0x68,0x28,0x82,0xf3,0x4c,0x90,0xed,0xaf,
+  0x3f,0x78,0xf5,0x7d,0x95,0xd2,0xcd,0xac,0x34,0x9b,0xfc,0x0b,0x79,0xab,0x54,0x23,
+  0x50,0x44,0x11,0x57,0x4c,0xdc,0x0c,0x77,0xb1,0x4a,0xd6,0xdc,0x5d,0x51,0x2f,0xdd,
+  0xd5,0x5a,0x99,0x6b,0xee,0xb6,0xd7,0x03,0xd5,0x66,0xe3,0x9a,0x0d,0x6a,0x9e,0x98,
+  0x70,0x0f,0xdc,0x6b,0x18,0xe6,0x96,0xca,0x0b,0x3a,0x70,0x2b,0xab,0x50,0xa5,0xb4,
+  0x10,0x94,0x17,0x71,0xb0,0xc7,0x75,0x14,0xb3,0xee,0x43,0xf7,0xf5,0x04,0x0a,0x35,
+  0xc2,0x8f,0x1b,0xae,0x36,0xee,0x27,0x07,0x40,0xc9,0x80,0xc4,0xcf,0x32,0xb3,0x4d,
+  0x16,0x54,0xfc,0xea,0x56,0xb8,0x09,0x4a,0x19,0xc9,0x18,0x46,0x9b,0xf9,0x73,0xea,
+  0xe2,0x15,0x25,0x8a,0x89,0xf3,0x52,0xcc,0x30,0x2c,0x0c,0x51,0x25,0xfe,0x56,0x94,
+  0x01,0xef,0xf8,0x3b,0xa6,0xa1,0x1a,0x6d,0xe0,0x43,0xa8,0xd2,0x61,0xba,0x5f,0x07,
+  0x6e,0x34,0x34,0xfb,0x99,0x4d,0x52,0x0b,0xc2,0xca,0x12,0x5a,0xd1,0x26,0x65,0x0c,
+  0xc3,0x5a,0xef,0xaa,0x90,0x34,0xf6,0x29,0xfe,0x57,0x1d,0x94,0x0e,0xdd,0xb0,0xc6,
+  0x2c,0x0d,0x88,0x4b,0x57,0xdf,0x67,0x3f,0x53,0xc5,0x7e,0x04,0x61,0x31,0x18,0x63,
+  0xc3,0x8d,0xa4,0xf9,0xcc,0x94,0x5a,0x02,0x8b,0x98,0x9c,0x91,0x42,0x82,0x6d,0x58,
+  0x63,0x9d,0x02,0xf0,0x00,0x87,0x77,0x2a,0x11,0xc1,0x34,0xc0,0x7e,0xe6,0x7d,0xe2,
+  0x67,0x99,0x0e,0xef,0x4b,0x2c,0xc3,0xc6,0x3a,0x61,0x89,0xf4,0x70,0xeb,0xb4,0xcc,
+  0x9d,0xa1,0x8a,0xa3,0x96,0x61,0xf7,0x4f,0x40,0x9c,0x67,0xdb,0x32,0x37,0x87,0x4a,
+  0x8f,0x12,0xd3,0xb0,0xda,0xd2,0x3a,0xce,0x3f,0x90,0xf9,0x42,0x88,0xc7,0xa7,0x61,
+  0xf4,0x5b,0x7d,0x87,0x4a,0x61,0x15,0xfb,0x8c,0x52,0x89,0x7b,0x8e,0x50,0x7b,0x65,
+  0x7c,0xaa,0x38,0x29,0xa8,0xde,0x33,0x25,0x21,0x61,0x1d,0x3c,0x68,0x18,0x76,0x2c,
+  0x2d,0xce,0x48,0x8f,0xa0,0x7e,0xba,0x93,0x55,0x14,0x2d,0xc3,0x9e,0x23,0x61,0x05,
+  0xac,0xea,0xb8,0x4e,0x29,0x49,0x09,0x9b,0x61,0x15,0x0b,0x21,0xce,0xdb,0xf7,0xe1,
+  0x58,0xe3,0x78,0xf2,0x3d,0x40,0x6e,0xb3,0x0c,0x67,0x3c,0x93,0xa0,0xb6,0xca,0x4a,
+  0x33,0xad,0x20,0x92,0x69,0x80,0xed,0x27,0xb2,0x0c,0x2d,0x18,0xf3,0xf8,0x85,0x26,
+  0x48,0x1b,0x86,0x6a,0xfb,0x49,0xa5,0x4a,0xb0,0x78,0x8d,0x61,0x38,0xe3,0x99,0x5c,
+  0x29,0x33,0x1d,0xde,0x11,0xe7,0x0d,0xc3,0x7e,0xa6,0xa0,0x9a,0x61,0x69,0xc7,0xa7,
+  0x33,0xb7,0xf8,0xf4,0x5a,0xf8,0x21,0xdc,0xa4,0x96,0x66,0xc9,0x2a,0x33,0x50,0xed,
+  0x67,0x66,0x6e,0x8a,0x08,0xe5,0xd0,0xc4,0xe4,0xa2,0xb4,0xc0,0x30,0xac,0xbe,0xa7,
+  0x41,0x50,0xaa,0x55,0x7f,0x5a,0x0c,0xc2,0x11,0x36,0x27,0xe3,0x97,0x45,0xc9,0x89,
+  0x41,0x5c,0x38,0xb5,0xfc,0x24,0x5c,0x33,0xfc,0x0f,0xb8,0x55,0xd3,0xbf,0xd4,0xef,
+  0xf8,0x29,0xb5,0xf4,0x85,0x5a,0x96,0xf8,0x2b,0xd6,0x4b,0x0f,0xf6,0x85,0x62,0x68,
+  0x38,0xf1,0xa9,0x22,0x3c,0xb8,0xd6,0x97,0x0b,0xe7,0x55,0x21,0xd5,0x1c,0xe6,0xf0,
+  0x5e,0x5d,0xd1,0xd9,0xbc,0xd2,0x30,0x5c,0xf1,0xa9,0xca,0xdf,0x0e,0xce,0x58,0x3c,
+  0xe5,0xc9,0x45,0xcd,0xe9,0x8a,0xa0,0xb4,0x58,0xa8,0x50,0xed,0xf1,0xa4,0x39,0x6b,
+  0x0e,0x72,0xaa,0x61,0x80,0x7d,0x19,0xf0,0x2e,0x47,0x24,0xaf,0x60,0x1a,0xce,0x78,
+  0xde,0x2d,0xde,0xab,0x9e,0x1e,0xba,0x75,0x5e,0x99,0x6d,0xa8,0x8e,0x9f,0xcd,0x6b,
+  0x4b,0xa7,0xb5,0xdd,0xa9,0x3c,0x59,0xe8,0x58,0x5b,0x3d,0xad,0xf5,0x4e,0xb0,0xe3,
+  0x13,0x10,0x5d,0x1c,0x9c,0xef,0xab,0x88,0x37,0x2f,0x7b,0xd2,0xf9,0xbd,0x7f,0x2b,
+  0xce,0xd7,0xb9,0xee,0xbb,0x7c,0x15,0xce,0xcf,0x75,0x3f,0xf3,0x2a,0x9c,0xbf,0x3d,
+  0x74,0xcf,0xaf,0x9f,0xda,0x3f,0xfc,0xbb,0xf1,0xdb,0xbf,0x6b,0x1a,0x4e,0x1b,0xe9,
+  0x80,0xed,0x10,0x51,0xbd,0xd3,0xfa,0x4d,0x43,0x76,0xda,0x74,0xe4,0xc3,0xb1,0x93,
+  0x1d,0xc3,0xb9,0x3a,0x90,0x17,0x53,0x95,0xc8,0x8e,0xf1,0xb1,0xfb,0xa6,0x69,0x1f,
+  0xbf,0x8f,0x9f,0x7e,0x34,0xfe,0xdc,0x80,0x65,0xd8,0x2d,0x57,0xcd,0xb8,0x69,0x98,
+  0x6d,0x1f,0xbf,0xcf,0xd5,0xf6,0xb1,0x3b,0x9d,0x3f,0x19,0xe6,0xed,0x20,0xdb,0xa1,
+  0x5b,0x9d,0x25,0xdb,0x86,0x73,0x9f,0xee,0xe7,0x15,0xc8,0xe4,0x6a,0xfb,0x58,0xff,
+  0xec,0x36,0x99,0xff,0x7d,0xb4,0x41,0xf8,0xa6,0xd1,0x3f,0xdd,0xe8,0x77,0x98,0x01,
+  0x7e,0x7d,0x10,0xbf,0x3e,0x4d,0x33,0x0d,0xd9,0xf1,0x85,0xf0,0xc2,0x1b,0x7a,0x29,
+  0x5b,0x86,0x7b,0x72,0x19,0xff,0x19,0x20,0xb2,0x65,0x38,0x2d,0x36,0x62,0xe8,0xd7,
+  0xa0,0x31,0xc2,0x0a,0xfc,0x6b,0x57,0x43,0xc3,0xc7,0x3f,0x0b,0x04,0xfe,0xd5,0xdb,
+  0xfe,0x1d,0x57,0xe3,0xe4,0xe4,0xa4,0x76,0x85,0xf1,0x9f,0xb3,0xcd,0x8a,0x79,0x99,
+  0xfc,0xbf,0x8f,0xf9,0x3f,0x78,0xdf,0x7f,0xaa,0x98,0x27,0xff,0xb6,0x98,0xb7,0x42,
+  0xdd,0x5a,0xd3,0x57,0xc5,0xfc,0x1f,0xbe,0x0f,0xfe,0x40,0xff,0xdc,0xe3,0xf2,0x87,
+  0x7b,0x0e,0x57,0xc7,0xbc,0x39,0xc2,0xca,0xc7,0x3f,0xbb,0xea,0xfa,0x24,0xe6,0xff,
+  0xb9,0xb6,0x7f,0xfe,0xe2,0x7f,0xcb,0x91,0xe8,0xff,0x5d,0xf4,0xf3,0x3f,0xf6,0x9e,
+  0x4f,0xae,0x4f,0xae,0x4f,0xae,0x4f,0xae,0x4f,0xae,0x4f,0xae,0xff,0x5f,0x2e,0x7d,
+  0x9f,0x24,0xfa,0x3e,0xa9,0xfd,0x47,0xfb,0xf2,0xc9,0xf5,0xc9,0xf5,0xc9,0xf5,0xc9,
+  0xf5,0xc9,0xf5,0xc9,0xf5,0x1f,0x71,0xc5,0xf8,0x9f,0x4b,0x80,0x23,0x39,0xf3,0xef,
+  0xff,0x8b,0x31,0x50,0xa7,0xfc,0xcb,0xdf,0xd7,0xbf,0xe7,0x89,0x41,0x4e,0x70,0xee,
+  0xdf,0x95,0xbd,0xda,0xd7,0xff,0x0b,0x1f,0xd5,0x6a,0x31,0xd4,0x60,0x00,0x00,

diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c
index ed86c025f68e0fe6a8ac8ce5a1837dedd7f58dae..a4f697409c6c4c0076ed307bb7d653d9cda62b09 100644 (file)
--- a/board/esd/pci405/pci405.c
+++ b/board/esd/pci405/pci405.c
@@ -29,25 +29,15 @@
 #include <pci.h>
 #include <405gp_pci.h>
 
+#include "pci405.h"
+
+
 /* ------------------------------------------------------------------------- */
 
 #if 0
 #define FPGA_DEBUG
 #endif
 
-#define PCI_RECONFIG_MAGIC       0x07081967
-
-
-struct pci_config_regs {
-       unsigned short  command;
-       unsigned char   latency_timer;
-       unsigned char   int_line;
-       unsigned long   bar1;
-       unsigned long   bar2;
-       unsigned long   magic;
-};
-
-
 /* fpga configuration data - generated by bin2cc */
 const unsigned char fpgadata[] =
 {
@@ -114,6 +104,8 @@ int misc_init_r (void)
        int index;
        int i;
        struct pci_config_regs *pci_regs;
+       unsigned int *ptr;
+       unsigned int *magic;
 
        /*
         * On PCI-405 the environment is saved in eeprom!
@@ -171,32 +163,33 @@ int misc_init_r (void)
        putc ('\n');
 
        /*
-        * Rewrite pci config regs (only after soft-reset with magic set)
+        * Reset FPGA via FPGA_DATA pin
         */
-       pci_regs = (struct pci_config_regs *)0x10;
-       if (pci_regs->magic == PCI_RECONFIG_MAGIC) {
-               puts("PCI:   Found magic, rewriting config regs...\n");
-               pci_write_config_word(PCIDEVID_405GP, PCI_COMMAND,
-                                     pci_regs->command);
-               pci_write_config_byte(PCIDEVID_405GP, PCI_LATENCY_TIMER,
-                                     pci_regs->latency_timer);
-               pci_write_config_byte(PCIDEVID_405GP, PCI_INTERRUPT_LINE,
-                                     pci_regs->int_line);
-               pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_1,
-                                      pci_regs->bar1);
-               pci_write_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_2,
-                                      pci_regs->bar2);
+       SET_FPGA(FPGA_PRG | FPGA_CLK);
+       udelay(1000); /* wait 1ms */
+       SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
+       udelay(1000); /* wait 1ms */
+
+       /*
+        * Check if magic for pci reconfig is written
+        */
+       magic = (unsigned int *)0x00000004;
+       if (*magic == PCI_RECONFIG_MAGIC) {
+               /*
+                * Rewrite pci config regs (only after soft-reset with magic set)
+                */
+               ptr = (unsigned int *)PCI_REGS_ADDR;
+               if (crc32(0, (char *)PCI_REGS_ADDR+4, PCI_REGS_LEN-4) == *ptr) {
+                       puts("Restoring PCI Configurations Regs!\n");
+                       ptr = (unsigned int *)PCI_REGS_ADDR + 1;
+                       for (i=0; i<0x40; i+=4) {
+                               pci_write_config_dword(PCIDEVID_405GP, i, *ptr++);
+                       }
+               }
+               mtdcr(uicsr, 0xFFFFFFFF);        /* clear all ints */
+               
+               *magic = 0;      /* clear pci reconfig magic again */
        }
-       pci_regs->magic = 0; /* clear magic again */
-
-#if 0 /* test-only */
-       pci_read_config_word(PCIDEVID_405GP, PCI_COMMAND, &(pci_regs->command));
-       pci_read_config_byte(PCIDEVID_405GP, PCI_LATENCY_TIMER, &(pci_regs->latency_timer));
-       pci_read_config_byte(PCIDEVID_405GP, PCI_INTERRUPT_LINE, &(pci_regs->int_line));
-       pci_read_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_1, &(pci_regs->bar1));
-       pci_read_config_dword(PCIDEVID_405GP, PCI_BASE_ADDRESS_2, &(pci_regs->bar2));
-       pci_regs->magic = PCI_RECONFIG_MAGIC; /* set magic */
-#endif
 
        free(dst);
        return (0);
@@ -215,7 +208,7 @@ int checkboard (void)
        puts ("Board: ");
 
        if (i == -1) {
-               puts ("### No HW ID - assuming CPCI405");
+               puts ("### No HW ID - assuming PCI405");
        } else {
                puts (str);
        }
@@ -238,7 +231,11 @@ long int initdram (int board_type)
        printf("strap=%x\n", mfdcr(strap)); /* test-only */
 #endif
 
+#if 0 /* test-only: all PCI405 version must report 16mb */
        return (4*1024*1024 << ((val & 0x000e0000) >> 17));
+#else
+       return (16*1024*1024);
+#endif
 }
 
 /* ------------------------------------------------------------------------- */

diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 3f9b8d40a9fb94b4b23c3cbc49ccde0cfc17d4f4..39fdf55bd30218d6cd78c1e55240e138f7737e4d 100644 (file)
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -40,9 +40,13 @@
 #define CONFIG_BOARD_PRE_INIT   1       /* call board_pre_init()        */
 #define CONFIG_MISC_INIT_R     1       /* call misc_init_r() on init   */
 
+#if 1 /* test-only */
 #define CONFIG_SYS_CLK_FREQ     25000000 /* external frequency to pll   */
+#else
+#define CONFIG_SYS_CLK_FREQ     16000000 /* external frequency to pll   */
+#endif
 
-#define CONFIG_BAUDRATE                9600
+#define CONFIG_BAUDRATE                115200
 #define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #if 0
@@ -78,6 +82,7 @@
                                CFG_CMD_ELF     | \
                                CFG_CMD_DATE    | \
                                CFG_CMD_I2C     | \
+                               CFG_CMD_BSP     | \
                                CFG_CMD_EEPROM  )
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
@@ -87,6 +92,8 @@
 
 #define        CONFIG_SDRAM_BANK0      1       /* init onboard SDRAM bank 0    */
 
+#define        CONFIG_PRAM             2048    /* reserve 2 MB "protected RAM" */ 
+
 /*
  * Miscellaneous configurable options
  */
@@ -128,7 +135,7 @@
 
 #define        CFG_HZ          1000            /* decrementer freq: 1 ms ticks */
 
-#define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
+#undef CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 
 /*-----------------------------------------------------------------------
  * PCI stuff
@@ -149,7 +156,7 @@
 #define CFG_PCI_SUBSYS_DEVICEID 0x0407  /* PCI Device ID: PCI-405       */
 #define CFG_PCI_CLASSCODE       0x0280  /* PCI Class Code: Network/Other*/
 #define CFG_PCI_PTM1LA  0x00000000      /* point to sdram               */
-#define CFG_PCI_PTM1MS  0xfc000001      /* 64MB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1MS  0xff000001      /* 16MB, enable hard-wired to 1 */
 #define CFG_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 
 #if 0 /* test-only */
@@ -158,8 +165,8 @@
 #define CFG_PCI_PTM2PCI 0x04000000      /* Host: use this pci address   */
 #else
 #define CFG_PCI_PTM2LA  0xef600000      /* point to internal regs       */
-#define CFG_PCI_PTM2MS  0xef600001      /* 4MB, enable                  */
-#define CFG_PCI_PTM2PCI 0x04000000      /* Host: use this pci address   */
+#define CFG_PCI_PTM2MS  0xffe00001      /* 2MB, enable                  */
+#define CFG_PCI_PTM2PCI 0x00000000      /* Host: use this pci address   */
 #endif
 
 /*-----------------------------------------------------------------------
@@ -269,6 +276,7 @@
 
 /* Memory Bank 2 (CAN0, 1) initialization                                       */
 #define CFG_EBC_PB2AP           0x010053C0  /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
+//#define CFG_EBC_PB2AP           0x038056C0  /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
 #define CFG_EBC_PB2CR           0xF0018000  /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit  */
 
 /* Memory Bank 3 (FPGA internal) initialization                                 */
@@ -319,19 +327,13 @@
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in data cache)
  */
-#if 1 /* test-only */
 #define CFG_INIT_DCACHE_CS      7       /* use cs # 7 for data cache memory    */
-
 #define CFG_INIT_RAM_ADDR       0x40000000  /* use data cache                  */
-#else
-#define CFG_INIT_RAM_ADDR      0x00df0000 /* inside of SDRAM                   */
-#endif
 #define CFG_INIT_RAM_END        0x2000  /* End of used area in RAM             */
 #define CFG_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 
-
 /*
  * Internal Definitions
  *