]> git.sur5r.net Git - u-boot/commitdiff
spi: spi-mxc: add defines for clk inactive state for ECSPI
authorMarkus Niebel <Markus.Niebel@tq-group.de>
Mon, 17 Feb 2014 16:33:16 +0000 (17:33 +0100)
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tue, 18 Feb 2014 16:59:26 +0000 (22:29 +0530)
Provide define for the SCLK_CTL field of the config reg of ECSPI.
While at it, oder the defines to improve readability and make
adding more defines easier.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
arch/arm/include/asm/arch-mx5/imx-regs.h
arch/arm/include/asm/arch-mx6/imx-regs.h

index 4955ccff87e5e02035ba70c728cb3df281abdb07..054c680a5a14ec40304aef6876d72fd8081ac16d 100644 (file)
 #define MXC_CSPICTRL_CHAN      18
 
 /* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL                4
-#define MXC_CSPICON_PHA                0
-#define MXC_CSPICON_SSPOL      12
+#define MXC_CSPICON_PHA                0  /* SCLK phase control */
+#define MXC_CSPICON_POL                4  /* SCLK polarity */
+#define MXC_CSPICON_SSPOL      12 /* SS polarity */
+#define MXC_CSPICON_CTL                20 /* inactive state of SCLK */
 #define MXC_SPI_BASE_ADDRESSES \
        CSPI1_BASE_ADDR, \
        CSPI2_BASE_ADDR, \
index f2ad6e9ad32fffda215e8beb8901d8ecff69a727..3c58c0118512532594bd1201a0b3d17109125124 100644 (file)
@@ -405,9 +405,10 @@ struct cspi_regs {
 #define MXC_CSPICTRL_CHAN      18
 
 /* Bit position inside CON register to be associated with SS */
-#define MXC_CSPICON_POL                4
-#define MXC_CSPICON_PHA                0
-#define MXC_CSPICON_SSPOL      12
+#define MXC_CSPICON_PHA                0  /* SCLK phase control */
+#define MXC_CSPICON_POL                4  /* SCLK polarity */
+#define MXC_CSPICON_SSPOL      12 /* SS polarity */
+#define MXC_CSPICON_CTL                20 /* inactive state of SCLK */
 #ifdef CONFIG_MX6SL
 #define MXC_SPI_BASE_ADDRESSES \
        ECSPI1_BASE_ADDR, \