Changes since U-Boot 1.1.4:
======================================================================
+* GCC-4.x fixes: clean up global data pointer initialization for all
+ boards
+
* Update for Delta board:
- redundant NAND environment
- misc Monahans cleanups (remove dead code etc.)
==> U-Boot will use R8 to hold a pointer to the global data
+NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
+or current versions of GCC may "optimize" the code too much.
Memory Management:
------------------
/*
* (C) Copyright 2002
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
+ * (C) Copyright 2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
void after_reloc (ulong dest_addr, gd_t *gd)
{
-/* HJF: DECLARE_GLOBAL_DATA_PTR; */
-
board_init_r (gd, dest_addr);
}
#include "smbus.h"
#include "via686.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef DEBUG
struct dimm_bank {
long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
{
- DECLARE_GLOBAL_DATA_PTR;
int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
uint32 busclock = gd->bus_clk;
uint32 memclock = busclock;
long articiaS_ram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
register uint32 i;
register uint32 value1;
register uint32 value2;
#include "memio.h"
#include "articiaS.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef ARTICIA_PCI_DEBUG
#ifdef ARTICIA_PCI_DEBUG
int articiaS_init_vga (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
extern void shutdown_bios(void);
pci_dev_t dev = ~0;
int busnr = 0;
#include "../disk/part_amiga.h"
#include <asm/cache.h>
+DECLARE_GLOBAL_DATA_PTR;
#undef BOOTA_DEBUG
s = getenv ("autostart");
if (s && strcmp (s, "yes") == 0) {
- DECLARE_GLOBAL_DATA_PTR;
-
void (*boot) (bd_t *, char *, block_dev_desc_t *);
char *args;
#include "memio.h"
#include "articiaS.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#ifndef CFG_NS16550
static uint32 ComPort1;
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint32 clock_divisor = 115200 / gd->baudrate;
NS16550_init (Com0, clock_divisor);
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint32 clock_divisor = 115200 / gd->baudrate;
NS16550_init (Com0, clock_divisor);
#include "via686.h"
#include "i8259.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef VIA_DEBUG
#ifdef VIA_DEBUG
extern unsigned long via_calibrate_time_base(void);
-void via_calibrate_bus_freq(void)
+void via_calibrate_bus_freq (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long tb;
+ unsigned long tb;
- /* This is 20 microseconds */
- #define CALIBRATE_TIME 28636
+ /* This is 20 microseconds */
+#define CALIBRATE_TIME 28636
+ /* Enable the timer (and disable speaker) */
+ unsigned char c;
- /* Enable the timer (and disable speaker) */
- unsigned char c;
- c = in_byte(0x61);
- out_byte(0x61, ((c & ~0x02) | 0x01));
+ c = in_byte (0x61);
+ out_byte (0x61, ((c & ~0x02) | 0x01));
- /* Set timer 2 to low/high writing */
- out_byte(0x43, 0xb0);
- out_byte(0x42, CALIBRATE_TIME & 0xff);
- out_byte(0x42, CALIBRATE_TIME >>8);
+ /* Set timer 2 to low/high writing */
+ out_byte (0x43, 0xb0);
+ out_byte (0x42, CALIBRATE_TIME & 0xff);
+ out_byte (0x42, CALIBRATE_TIME >> 8);
- /* Read the time base */
- tb = via_calibrate_time_base();
+ /* Read the time base */
+ tb = via_calibrate_time_base ();
- if (tb >= 700000)
- gd->bus_clk = 133333333;
- else
- gd->bus_clk = 100000000;
+ if (tb >= 700000)
+ gd->bus_clk = 133333333;
+ else
+ gd->bus_clk = 100000000;
}
#include "memio.h"
#include <part.h>
+DECLARE_GLOBAL_DATA_PTR;
+
unsigned char *cursor_position;
unsigned int cursor_row;
unsigned int cursor_col;
void video_banner(void)
{
block_dev_desc_t *ide;
- DECLARE_GLOBAL_DATA_PTR;
int i;
char *s;
int maxdev;
#include "ns16550.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_MPSC
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
int clock_divisor = 230400 / gd->baudrate;
#endif
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
}
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = 230400 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = 230400 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
#include "../include/memory.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* Define this if you wish to use the MPSC as a register based UART.
* This will force the serial port to not use the SDMA engine at all.
*/
/* Clear the CFR (CHR4) */
/* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
- temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &"
-
-REG_GAP));
+ temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
temp &= 0xffffff00;
temp |= BIT29;
GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
* global variables [josh] */
int mpsc_putchar_early (char ch)
{
- DECLARE_GLOBAL_DATA_PTR;
int mpsc = CHANNEL;
int temp =
GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
int galbrg_set_baudrate (int channel, int rate)
{
- DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable (channel); /*ok */
pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
pkt_info.byte_cnt = dataSize;
pkt_info.buf_ptr = (unsigned int) dataPtr;
+ pkt_info.return_info = 0;
status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
#include "64360.h"
#include "mv_regs.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef DEBUG
#define MAP_PCI
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long spd_checksum;
#ifdef ZUMA_NTL
#include "../include/memory.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* Define this if you wish to use the MPSC as a register based UART.
* This will force the serial port to not use the SDMA engine at all.
*/
/* Clear the CFR (CHR4) */
/* Write random 'Z' bit (bit 29) of CHR4 to enable debug uart *UNDOCUMENTED FEATURE* */
- temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_indent: Standard input:229: Warning:old style assignment ambiguity in "=&". Assuming "= &"
-
-REG_GAP));
+ temp = GTREGREAD (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP));
temp &= 0xffffff00;
temp |= BIT29;
GT_REG_WRITE (GALMPSC_CHANNELREG_4 + (CHANNEL * GALMPSC_REG_GAP),
* global variables [josh] */
int mpsc_putchar_early (char ch)
{
- DECLARE_GLOBAL_DATA_PTR;
int mpsc = CHANNEL;
int temp =
GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
int galbrg_set_baudrate (int channel, int rate)
{
- DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable (channel); /*ok */
pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
pkt_info.byte_cnt = dataSize;
pkt_info.buf_ptr = (unsigned int) dataPtr;
+ pkt_info.return_info = 0;
status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
#include "64460.h"
#include "mv_regs.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef DEBUG
#define MAP_PCI
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long spd_checksum;
#ifdef ZUMA_NTL
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/*
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#define FLASH_ONBD_N 2 /* 00000010 */
#define FLASH_SRAM_SEL 1 /* 00000001 */
+DECLARE_GLOBAL_DATA_PTR;
+
long int fixed_sdram(void);
int board_early_init_f(void)
long dram_size = 0;
#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram(0);
+ dram_size = spd_sdram();
#else
dram_size = fixed_sdram();
#endif
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
#include <spd_sdram.h>
#include "epld.h"
+DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
#include <spd_sdram.h>
#include <ppc4xx_enet.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define BOOT_SMALL_FLASH 32 /* 00100000 */
#define FLASH_ONBD_N 2 /* 00000010 */
#define FLASH_SRAM_SEL 1 /* 00000001 */
long dram_size = 0;
#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
+ dram_size = spd_sdram ();
#else
dram_size = fixed_sdram ();
#endif
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
*/
long int initdram(int board_type)
{
- return spd_sdram(0);
+ return spd_sdram();
}
int testdram(void)
#include <asm/processor.h>
#include <spd_sdram.h>
+DECLARE_GLOBAL_DATA_PTR;
+
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
int board_early_init_f(void)
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
uint pbcr;
int size_val = 0;
#include <asm/processor.h>
#include <spd_sdram.h>
+DECLARE_GLOBAL_DATA_PTR;
+
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
int board_early_init_f(void)
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
uint pbcr;
int size_val = 0;
#include <ns16550.h>
-#if 0
-#include "serial.h"
-#endif
+DECLARE_GLOBAL_DATA_PTR;
const NS16550_t COM_PORTS[] =
{ (NS16550_t) CFG_NS16550_COM1, (NS16550_t) CFG_NS16550_COM2 };
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
(void) NS16550_init (COM_PORTS[0], clock_divisor);
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
#include <common.h>
#include <clps7111.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <common.h>
#include <SA-1100.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/*
int
board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_arch_number = MACH_TYPE_ASSABET;
gd->bd->bi_boot_params = 0xc0000100;
int
dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <at91rm9200_net.h>
#include <dm9161.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Enable Ctrlc */
console_init_f ();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
#include <common.h>
#include "ns16550.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#if CONFIG_CONS_INDEX == 1
static struct NS16550 *console =
(struct NS16550 *) (CFG_EUMB_ADDR + 0x4500);
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = gd->bus_clk / 16 / gd->baudrate;
NS16550_init (CONFIG_CONS_INDEX - 1, clock_divisor);
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = get_bus_freq (0) / 16 / gd->baudrate;
NS16550_reinit (console, clock_divisor);
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <common.h>
#include <asm/arch/platform.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of CM4008 */
gd->bd->bi_arch_number = 624;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <common.h>
#include <asm/arch/platform.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
#define ks8695_read(a) *((volatile unsigned int *) (KS8695_IO_BASE+(a)))
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of CM41xx */
gd->bd->bi_arch_number = 672;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <at91rm9200_net.h>
#include <dm9161.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
AT91PS_PIO piob = AT91C_BASE_PIOB;
AT91PS_PIO pioc = AT91C_BASE_PIOC;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
#include <common.h>
#include <board/cogent/serial.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
int serial_init (void)
{
-/* DECLARE_GLOBAL_DATA_PTR; */
-
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
- cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
- serial_setbrg ();
- cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
- cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
- cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
+ cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
+ serial_setbrg ();
+ cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
+ cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
+ cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
- return (0);
+ return (0);
}
-void
-serial_setbrg (void)
+void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
- unsigned int divisor;
- unsigned char lcr;
-
- if ((divisor = br_to_div(gd->baudrate)) == 0)
- divisor = DEFDIV;
-
- lcr = cma_mb_reg_read(&mbsp->ser_lcr);
- cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/
- cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
- cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
- cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
+ unsigned int divisor;
+ unsigned char lcr;
+
+ if ((divisor = br_to_div (gd->baudrate)) == 0)
+ divisor = DEFDIV;
+
+ lcr = cma_mb_reg_read (&mbsp->ser_lcr);
+ cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */
+ cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
+ cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
+ cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */
}
-void
-serial_putc(const char c)
+void serial_putc (const char c)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
- if (c == '\n')
- serial_putc('\r');
+ if (c == '\n')
+ serial_putc ('\r');
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
- ;
+ while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
- cma_mb_reg_write(&mbsp->ser_thr, c);
+ cma_mb_reg_write (&mbsp->ser_thr, c);
}
-void
-serial_puts(const char *s)
+void serial_puts (const char *s)
{
- while (*s != '\0')
- serial_putc(*s++);
+ while (*s != '\0')
+ serial_putc (*s++);
}
-int
-serial_getc(void)
+int serial_getc (void)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
- ;
+ while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
- return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
+ return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
}
-int
-serial_tstc(void)
+int serial_tstc (void)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
- return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0);
+ return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
}
#endif /* CONS_NONE */
#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
#endif
-void
-kgdb_serial_init(void)
+void kgdb_serial_init (void)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
- unsigned int divisor;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
+ unsigned int divisor;
- if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0)
- divisor = DEFDIV;
+ if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
+ divisor = DEFDIV;
- cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */
- cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/
- cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff);
- cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff);
- cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
- cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */
- cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
+ cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
+ cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */
+ cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
+ cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
+ cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
+ cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
+ cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
- printf("[on cma10x serial port B] ");
+ printf ("[on cma10x serial port B] ");
}
-void
-putDebugChar(int c)
+void putDebugChar (int c)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0)
- ;
+ while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
- cma_mb_reg_write(&mbsp->ser_thr, c & 0xff);
+ cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
}
-void
-putDebugStr(const char *str)
+void putDebugStr (const char *str)
{
- while (*str != '\0') {
- if (*str == '\n')
- putDebugChar('\r');
- putDebugChar(*str++);
- }
+ while (*str != '\0') {
+ if (*str == '\n')
+ putDebugChar ('\r');
+ putDebugChar (*str++);
+ }
}
-int
-getDebugChar(void)
+int getDebugChar (void)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
- while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0)
- ;
+ while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
- return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f);
+ return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
}
-void
-kgdb_interruptible(int yes)
+void kgdb_interruptible (int yes)
{
- cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE;
-
- if (yes == 1) {
- printf("kgdb: turning serial ints on\n");
- cma_mb_reg_write(&mbsp->ser_ier, 0xf);
- }
- else {
- printf("kgdb: turning serial ints off\n");
- cma_mb_reg_write(&mbsp->ser_ier, 0x0);
- }
+ cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
+
+ if (yes == 1) {
+ printf ("kgdb: turning serial ints on\n");
+ cma_mb_reg_write (&mbsp->ser_ier, 0xf);
+ } else {
+ printf ("kgdb: turning serial ints off\n");
+ cma_mb_reg_write (&mbsp->ser_ier, 0x0);
+ }
}
#endif /* KGDB && KGDB_NONE */
#include <asm/arch/pxa-regs.h>
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
board_init (void)
/**********************************************************/
{
- DECLARE_GLOBAL_DATA_PTR;
-
led_code (0xf, YELLOW);
/* arch number of HHP Cradle */
dram_init (void)
/**********************************************************/
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <common.h>
#include <asm/arch/pxa-regs.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SHOW_BOOT_PROGRESS
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
#else
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <at91rm9200_net.h>
#include <bcm5221.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Enable Ctrlc */
console_init_f ();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
* (C) Copyright 2001
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*
- * (C) Copyright 2001, 2002
+ * (C) Copyright 2001-2006
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
* See file CREDITS for list of people who contributed to this
#include <asm/processor.h>
#include <pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define BOARD_REV_REG 0xFE80002B
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char revision = *(volatile char *)(BOARD_REV_REG);
char buf[32];
#include <common.h>
#include <asm/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Miscelaneous platform dependent initialization
*/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
u32 temp;
/* Configuration Port Control Register*/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* Prototypes */
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart = 0 - flash_info[0].size;
gd->bd->bi_flashoffset= flash_info[0].size - CFG_MONITOR_LEN;
#include <da9030.h>
#include <asm/arch/pxa-regs.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
static void init_DA9030(void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <common.h>
#include <SA-1100.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
/* arch number of DNP1110-Board */
gd->bd->bi_arch_number = MACH_TYPE_DNP1110;
- /* flash vpp on */
- PPDR |= 0x80; /* assumes LCD controller is off */
- PPSR |= 0x80;
+ /* flash vpp on */
+ PPDR |= 0x80; /* assumes LCD controller is off */
+ PPSR |= 0x80;
return 0;
}
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <ns87308.h>
#include <video_fb.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*---------------------------------------------------------------------------*/
/*
* Get Bus clock frequency
void after_reloc (ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*
* Jump to the main U-Boot board init code
*/
#include <mpc106.h>
#include <video_fb.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
int checkboard (void)
void after_reloc (ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*
* Jump to the main U-Boot board init code
*/
#include <common.h>
#include <clps7111.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <command.h>
#include <malloc.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#if 0
#define FPGA_DEBUG
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile unsigned short *fpga_mode =
(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
volatile unsigned short *fpga_ctrl2 =
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
#include <asm/processor.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
extern void lxt971_no_sleep(void);
int board_early_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int index, len, i;
int status;
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int index;
int len;
char str[64];
#include <asm/processor.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int board_early_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long cntrl0Reg;
int index, len, i;
int status;
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int board_early_init_f (void)
{
unsigned long cntrl0Reg;
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long cntrl0Reg;
/* adjust flash start and offset */
#include <malloc.h>
#include <net.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
+
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
#if 0
#define FPGA_DEBUG
#endif
#ifdef FPGA_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
/* set up serial port with default baudrate */
(void) get_clocks ();
gd->baudrate = CONFIG_BAUDRATE;
if (status != 0) {
/* booting FPGA failed */
#ifndef FPGA_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
/* set up serial port with default baudrate */
(void) get_clocks ();
gd->baudrate = CONFIG_BAUDRATE;
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long cntrl0Reg;
/* adjust flash start and offset */
*/
int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
char *buf;
ulong crc;
#include "../../Marvell/include/memory.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* Define this if you wish to use the MPSC as a register based UART.
* This will force the serial port to not use the SDMA engine at all.
*/
* global variables [josh] */
int mpsc_putchar_early (char ch)
{
- DECLARE_GLOBAL_DATA_PTR;
int mpsc = CHANNEL;
int temp =
GTREGREAD (GALMPSC_CHANNELREG_2 + (mpsc * GALMPSC_REG_GAP));
int galbrg_set_baudrate (int channel, int rate)
{
- DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable (channel); /*ok */
pkt_info.cmd_sts = ETH_TX_FIRST_DESC | ETH_TX_LAST_DESC; /* DMA owned, first last */
pkt_info.byte_cnt = dataSize;
pkt_info.buf_ptr = (unsigned int) dataPtr;
+ pkt_info.return_info = 0;
status = eth_port_send (ethernet_private, ETH_Q0, &pkt_info);
if ((status == ETH_ERROR) || (status == ETH_QUEUE_FULL)) {
#include "64360.h"
#include "mv_regs.h"
+DECLARE_GLOBAL_DATA_PTR;
#undef DEBUG
/* #define DEBUG */
/* static int check_dimm(uchar slot, AUX_MEM_DIMM_INFO *info) */
static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long spd_checksum;
uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
#include "../../Marvell/include/memory.h"
#include "serial.h"
-
#include "mpsc.h"
+DECLARE_GLOBAL_DATA_PTR;
+
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
mpsc_init (gd->baudrate);
return (0);
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
galbrg_set_baudrate (CONFIG_MPSC_PORT, gd->baudrate);
}
#include <asm/processor.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int board_early_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int index, len, i;
volatile unsigned char dummy;
int status;
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
#include <405gp_i2c.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int board_early_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int index, len, i;
int status;
#include <pci.h>
#include <sm501.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_VIDEO_SM501
#define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\
int cf_enable(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
volatile unsigned short *fpga_ctrl =
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile unsigned short *fpga_ctrl =
(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
volatile unsigned short *lcd_contrast =
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile unsigned short *fpga_mode =
(unsigned short *)((ulong)CFG_FPGA_BASE_ADDR + CFG_FPGA_CTRL);
volatile unsigned short *fpga_status =
*/
void video_get_info_str (int line_number, char *info)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char str[64];
char str2[64];
int i = getenv_r("serial#", str2, sizeof(str));
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-
int board_revision(void)
{
unsigned long osrl_reg;
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
*/
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
#include "pci405.h"
+DECLARE_GLOBAL_DATA_PTR;
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
unsigned long fpga_done_state(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->board_type < 2) {
return FPGA_DONE_STATE_V11;
} else {
unsigned long fpga_init_state(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->board_type < 2) {
return FPGA_INIT_STATE_V11;
} else {
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
#include <command.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
#include <pci.h>
#include <i2c.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard (void)
{
/*TODO: Check processor type */
int misc_init_r(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Write ethernet addr in NVRAM for VxWorks */
nvram_write(CFG_ENV_ADDR + CFG_NVRAM_VXWORKS_OFFS,
(char*)&gd->bd->bi_enetaddr[0], 6);
#include <common.h>
#include <mpc8xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char *s = getenv ("serial#");
char *e;
#include <asm/hardware.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_EVB4510
/* ------------------------------------------------------------------------- */
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
icache_enable();
/* address for the kernel command line */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#if CONFIG_NR_DRAM_BANKS == 2
#include "mpsc.h"
#include "i2c.h"
#include "64260.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_ZUMA_V2
extern void zuma_mbox_init(void);
#endif
void
after_reloc(ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* check to see if we booted from the sram. If so, move things
* back to the way they should be. (we're running from main
* memory at this point now */
#include <malloc.h>
#include "mpsc.h"
+DECLARE_GLOBAL_DATA_PTR;
+
int (*mpsc_putchar)(char ch) = mpsc_putchar_early;
static volatile unsigned int *rx_desc_base=NULL;
int
mpsc_putchar_early(char ch)
{
- DECLARE_GLOBAL_DATA_PTR;
int mpsc=CHANNEL;
int temp=GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
galmpsc_set_tcschar(mpsc,ch);
return 0;
}
-char
-mpsc_getchar(void)
+char mpsc_getchar (void)
{
- DECLARE_GLOBAL_DATA_PTR;
- static unsigned int done = 0;
- volatile char ch;
- unsigned int len=0, idx=0, temp;
-
- volatile unsigned int *p;
-
-
- do {
- p=&rx_desc_base[rx_desc_index*8];
-
- INVALIDATE_DCACHE(&p[0], &p[1]);
- /* Wait for character */
- while (p[1] & DESC_OWNER){
- udelay(100);
- INVALIDATE_DCACHE(&p[0], &p[1]);
- }
-
- /* Handle error case */
- if (p[1] & (1<<15)) {
- printf("oops, error: %08x\n", p[1]);
-
- temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,CHANNEL,GALMPSC_REG_GAP);
- temp |= (1 << 23);
- GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2, CHANNEL,GALMPSC_REG_GAP, temp);
-
- /* Can't poll on abort bit, so we just wait. */
- udelay(100);
+ static unsigned int done = 0;
+ volatile char ch;
+ unsigned int len = 0, idx = 0, temp;
- galsdma_enable_rx();
- }
-
- /* Number of bytes left in this descriptor */
- len = p[0] & 0xffff;
-
- if (len) {
- /* Where to look */
- idx = 5;
- if (done > 3) idx = 4;
- if (done > 7) idx = 7;
- if (done > 11) idx = 6;
-
- INVALIDATE_DCACHE(&p[idx], &p[idx+1]);
- ch = p[idx] & 0xff;
- done++;
- }
+ volatile unsigned int *p;
- if (done < len) {
- /* this descriptor has more bytes still
- * shift down the char we just read, and leave the
- * buffer in place for the next time around
- */
- p[idx] = p[idx] >> 8;
- FLUSH_DCACHE(&p[idx], &p[idx+1]);
- }
- if (done == len) {
- /* nothing left in this descriptor.
- * go to next one
- */
- p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
- p[0] = 0x00100000;
- FLUSH_DCACHE(&p[0], &p[1]);
- /* Next descriptor */
- rx_desc_index = (rx_desc_index + 1) % RX_DESC;
- done = 0;
- }
- } while (len==0); /* galileo bug.. len might be zero */
-
- return ch;
+ do {
+ p = &rx_desc_base[rx_desc_index * 8];
+
+ INVALIDATE_DCACHE (&p[0], &p[1]);
+ /* Wait for character */
+ while (p[1] & DESC_OWNER) {
+ udelay (100);
+ INVALIDATE_DCACHE (&p[0], &p[1]);
+ }
+
+ /* Handle error case */
+ if (p[1] & (1 << 15)) {
+ printf ("oops, error: %08x\n", p[1]);
+
+ temp = GTREGREAD_MIRROR (GALMPSC_CHANNELREG_2,
+ CHANNEL, GALMPSC_REG_GAP);
+ temp |= (1 << 23);
+ GT_REG_WRITE_MIRROR (GALMPSC_CHANNELREG_2, CHANNEL,
+ GALMPSC_REG_GAP, temp);
+
+ /* Can't poll on abort bit, so we just wait. */
+ udelay (100);
+
+ galsdma_enable_rx ();
+ }
+
+ /* Number of bytes left in this descriptor */
+ len = p[0] & 0xffff;
+
+ if (len) {
+ /* Where to look */
+ idx = 5;
+ if (done > 3)
+ idx = 4;
+ if (done > 7)
+ idx = 7;
+ if (done > 11)
+ idx = 6;
+
+ INVALIDATE_DCACHE (&p[idx], &p[idx + 1]);
+ ch = p[idx] & 0xff;
+ done++;
+ }
+
+ if (done < len) {
+ /* this descriptor has more bytes still
+ * shift down the char we just read, and leave the
+ * buffer in place for the next time around
+ */
+ p[idx] = p[idx] >> 8;
+ FLUSH_DCACHE (&p[idx], &p[idx + 1]);
+ }
+
+ if (done == len) {
+ /* nothing left in this descriptor.
+ * go to next one
+ */
+ p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST;
+ p[0] = 0x00100000;
+ FLUSH_DCACHE (&p[0], &p[1]);
+ /* Next descriptor */
+ rx_desc_index = (rx_desc_index + 1) % RX_DESC;
+ done = 0;
+ }
+ } while (len == 0); /* galileo bug.. len might be zero */
+
+ return ch;
}
int
int
mpsc_init(int baud)
{
- DECLARE_GLOBAL_DATA_PTR;
-
memset(MIRROR_HACK, 0, sizeof(struct _tag_mirror_hack));
MIRROR_HACK->GALMPSC_ROUTING_REGISTER_M=0x3fffffff;
int
galbrg_set_baudrate(int channel, int rate)
{
- DECLARE_GLOBAL_DATA_PTR;
int clock;
galbrg_disable(channel);
static int
galbrg_set_CDV(int channel, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
static int
galbrg_enable(int channel)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
static int
galbrg_disable(int channel)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG, channel, GALBRG_REG_GAP);
static int
galbrg_set_clksrc(int channel, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALBRG_0_CONFREG,channel, GALBRG_REG_GAP);
static int
galmpsc_connect(int channel, int connect)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR_G(GALMPSC_ROUTING_REGISTER);
static int
galmpsc_route_rx_clock(int channel, int brg)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR_G(GALMPSC_RxC_ROUTE);
static int
galmpsc_route_tx_clock(int channel, int brg)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR_G(GALMPSC_TxC_ROUTE);
static int
galmpsc_config_channel_regs(int mpsc)
{
- DECLARE_GLOBAL_DATA_PTR;
GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP, 0);
GT_REG_WRITE_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP, 0);
GT_REG_WRITE(GALMPSC_CHANNELREG_3+(mpsc*GALMPSC_REG_GAP), 1);
static int
galmpsc_set_brkcnt(int mpsc, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
static int
galmpsc_set_tcschar(int mpsc, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_1,mpsc,GALMPSC_REG_GAP);
static int
galmpsc_set_char_length(int mpsc, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
static int
galmpsc_set_stop_bit_length(int mpsc, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_PROTOCONF_REG,mpsc,GALMPSC_REG_GAP);
static int
galmpsc_set_parity(int mpsc, int value)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
static int
galmpsc_enter_hunt(int mpsc)
{
- DECLARE_GLOBAL_DATA_PTR;
int temp;
temp = GTREGREAD_MIRROR(GALMPSC_CHANNELREG_2,mpsc,GALMPSC_REG_GAP);
static int
galmpsc_shutdown(int mpsc)
{
- DECLARE_GLOBAL_DATA_PTR;
#if 0
unsigned int temp;
#include "i2c.h"
#include "64260.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* #define DEBUG */
#define MAP_PCI
* the array which is passed in with the relevant information */
static int check_dimm (uchar slot, sdram_info_t * info)
{
- DECLARE_GLOBAL_DATA_PTR;
uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
int ret;
uchar rows, cols, sdram_banks, supp_cal, width, cal_val;
#include "mpsc.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
(NS16550_t) CFG_NS16550_COM2 };
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#endif
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
galbrg_set_baudrate(CONFIG_MPSC_PORT, gd->baudrate);
}
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
#include "psd4256.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
long int initdram(int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
int brate;
char *tmp = getenv("baudrate");
#include <common.h>
#include <SA-1100.h>
-/* ------------------------------------------------------------------------- */
+
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int
board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT;
gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */
int
dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <command.h>
#include "fpga.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_FPGA)
#if 0
*/
int gen860t_init_fpga (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off);
#include "fpga.h"
#include "ioport.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
*/
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char *s;
char buf[64];
int i;
return 0; /* No hotkeys supported */
}
#endif
-
-/* vim: set ts=4 sw=4 tw=78 : */
# define SHOW_BOOT_PROGRESS(arg)
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char *s = getenv ("serial#");
char *e;
#include <net.h>
#include <asm/iopin_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*-----------------------------------------------------------------------
* Board Special Commands: FPGA load/store, EEPROM erase
*/
int
fpga_load (int mezz, uchar *addr, ulong size)
{
- DECLARE_GLOBAL_DATA_PTR;
-
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
xlx_info_t *fp;
xlx_iopins_t *fpgaio;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* imports from fetch.c */
extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
static int
env_callback (uchar *name, uchar *value)
{
- DECLARE_GLOBAL_DATA_PTR;
-
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
char ov[CFG_CBSIZE], nv[CFG_CBSIZE], *p, *q, *nn, c, *curver, *newver;
int override = 1, append = 0, remove = 0, nnl, ovl, nvl;
#include <i2c.h>
#include <asm/iopin_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* imports from eeprom.c */
int
last_stage_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
int rc;
#include <ioports.h>
#include <mpc8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* I/O Port configuration table
*
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_flashstart = 0xff800000;
}
#include <common.h>
#include <clps7111.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <asm/arch/pxa-regs.h>
#include <asm/mach-types.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SHOW_BOOT_PROGRESS
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
#else
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <pci.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of Integrator Board */
gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of Integrator Board */
gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <asm/arch/ixp425.h>
#include <common.h>
-/* ------------------------------------------------------------------------- */
-
-
-/* local prototypes */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of IXDP */
gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <at91rm9200_net.h>
#include <lxt971a.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Enable Ctrlc */
console_init_f ();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
#include "s1d13706.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#undef DEBUG
#ifdef DEBUG
# define debugk(fmt,args...) printf(fmt ,##args)
/* ------------------------------------------------------------------------- */
-#if 0
-static long int dram_size (long int, long int *, long int);
-#endif
-
#ifdef CONFIG_KUP4K_LOGO
void lcd_logo(bd_t *bd);
#endif
/* ------------------------------------------------------------------------- */
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-#if 0
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile long int *addr;
- ulong cnt, val;
- ulong save[32]; /* to make test non-destructive */
- unsigned char i = 0;
-
- memctl->memc_mamr = mamr_value;
-
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = base + cnt; /* pointer arith! */
-
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- /* write 0 to base address */
- addr = base;
- save[i] = *addr;
- *addr = 0;
-
- /* check at base address */
- if ((val = *addr) != 0) {
- *addr = save[i];
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
-
- val = *addr;
- *addr = save[--i];
-
- if (val != (~cnt)) {
- return (cnt * sizeof (long));
- }
- }
- return (maxsize);
-}
-#endif
-
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_STATUS_LED
volatile immap_t *immap = (immap_t *) CFG_IMMR;
#endif
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
bd->bi_dram[0].start = PHYS_SDRAM_1;
#include <common.h>
#include <asm/arch/pxa-regs.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/**
* board_init: - setup some data structures
*
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <lpd7a400_cpld.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Miscellaneous platform dependent initialisations
*/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* set up the I/O ports */
/* enable flash programming */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <common.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <linux/types.h>
#include <linux/string.h> /* for strdup */
+DECLARE_GLOBAL_DATA_PTR;
+
/*------------------------ Local prototypes ---------------------------*/
static long int dram_size (long int, long int *, long int);
static void kbd_init (void);
***********************************************************************/
int board_postclk_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
kbd_init();
#ifdef CONFIG_MODEM_SUPPORT
struct serial_device * default_serial_console (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return gd->do_mdm_init ? &serial_scc_device : &serial_smc_device;
}
static void kbd_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uchar kbd_data[KEYBD_DATALEN];
uchar tmp_data[KEYBD_DATALEN];
uchar val, errcd;
***********************************************************************/
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
uchar kbd_init_status = gd->kbd_status >> 8;
#include "mt48lc8m32b2-6-7.h"
+DECLARE_GLOBAL_DATA_PTR;
+
extern flash_info_t flash_info[]; /* FLASH chips info */
ulong flash_get_size (ulong base, int banknum);
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*
* Adjust flash start and offset to detected values
*/
#include <ns16550.h>
#endif
-#if 0
-#include "serial.h"
-#endif
+DECLARE_GLOBAL_DATA_PTR;
#if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2)
const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1,
- (NS16550_t) CFG_NS16550_COM2 };
+ (NS16550_t) CFG_NS16550_COM2
+};
#endif
-int
-serial_init (void)
+int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
+ int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
- (void)NS16550_init(COM_PORTS[0], clock_divisor);
+ (void) NS16550_init (COM_PORTS[0], clock_divisor);
#endif
#ifdef CFG_INIT_CHAN2
- (void)NS16550_init(COM_PORTS[1], clock_divisor);
+ (void) NS16550_init (COM_PORTS[1], clock_divisor);
#endif
- return 0;
+ return 0;
}
-void
-serial_putc(const char c)
+void serial_putc (const char c)
{
- if (c == '\n')
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r');
+ if (c == '\n')
+ NS16550_putc (COM_PORTS[CFG_DUART_CHAN], '\r');
- NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c);
+ NS16550_putc (COM_PORTS[CFG_DUART_CHAN], c);
}
-int
-serial_getc(void)
+int serial_getc (void)
{
- return NS16550_getc(COM_PORTS[CFG_DUART_CHAN]);
+ return NS16550_getc (COM_PORTS[CFG_DUART_CHAN]);
}
-int
-serial_tstc(void)
+int serial_tstc (void)
{
- return NS16550_tstc(COM_PORTS[CFG_DUART_CHAN]);
+ return NS16550_tstc (COM_PORTS[CFG_DUART_CHAN]);
}
-void
-serial_setbrg (void)
+void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
- int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
+ int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
#ifdef CFG_INIT_CHAN1
- NS16550_reinit(COM_PORTS[0], clock_divisor);
+ NS16550_reinit (COM_PORTS[0], clock_divisor);
#endif
#ifdef CFG_INIT_CHAN2
- NS16550_reinit(COM_PORTS[1], clock_divisor);
+ NS16550_reinit (COM_PORTS[1], clock_divisor);
#endif
}
-void
-serial_puts (const char *s)
+void serial_puts (const char *s)
{
while (*s) {
serial_putc (*s++);
}
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-void
-kgdb_serial_init(void)
+void kgdb_serial_init (void)
{
}
-void
-putDebugChar (int c)
+void putDebugChar (int c)
{
serial_putc (c);
}
-void
-putDebugStr (const char *str)
+void putDebugStr (const char *str)
{
serial_puts (str);
}
-int
-getDebugChar (void)
+int getDebugChar (void)
{
- return serial_getc();
+ return serial_getc ();
}
-void
-kgdb_interruptible (int yes)
+void kgdb_interruptible (int yes)
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif /* CFG_CMD_KGDB */
#include <common.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
/* address for the kernel command line */
gd->bd->bi_boot_params = 0x800;
return 0;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
if (CONFIG_NR_DRAM_BANKS == 2) {
#include <dm9161.h>
#include <asm/mach-types.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Enable Ctrlc */
console_init_f ();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
/* DDR SDRAM - Main SODIMM */
im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
#if defined(CONFIG_SPD_EEPROM)
- msize = spd_sdram(NULL);
+ msize = spd_sdram();
#else
msize = fixed_sdram();
#endif
#include <asm/mpc8349_pci.h>
#include <i2c.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_PCI
/* System RAM mapped to PCI space */
void
pci_init_board(void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t * immr;
volatile clk8349_t * clk;
volatile law8349_t * pci_law;
#include "../mip405/mip405.h"
#include <405gp_pci.h>
#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_PATI)
#define FIRM_START 0xFFF00000
#endif
void video_get_info_str (int line_number, char *info)
{
/* init video info strings for graphic console */
- DECLARE_GLOBAL_DATA_PTR;
PPC405_SYS_INFO sys_info;
char rev;
int i,boot;
#include <asm/processor.h>
#include <405gp_i2c.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define FALSE 0
#define TRUE 1
-#define TEST_QUIET 8
+#define TEST_QUIET 8
#define TEST_SHOW_PROG 4
#define TEST_SHOW_ERR 2
-#define TEST_SHOW_ALL 1
+#define TEST_SHOW_ALL 1
#define TESTPAT1 0xAA55AA55
#define TESTPAT2 0x55AA55AA
void mem_test_reloc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
int i;
for (i=0; i< TEST_STAGES; i++) {
#ifdef CONFIG_405GP
#ifdef CONFIG_PCI
-#undef DEBUG
+DECLARE_GLOBAL_DATA_PTR;
#include "piix4_pci.h"
#include "pci_parts.h"
static void reloc_pci_cfg_table(struct pci_config_table *table)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
for (; table && table->vendor; table++) {
#include "../common/common_util.h"
#include <i2c.h>
#include <rtc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
extern block_dev_desc_t * scsi_get_dev(int dev);
extern block_dev_desc_t * ide_get_dev(int dev);
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
(void) get_clocks ();
gd->baudrate = 9600;
serial_init ();
int init_sdram (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long tmp, baseaddr;
unsigned short i;
unsigned char trp_clocks,
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
#include "../common/isa.h"
#include "../common/common_util.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef SDRAM_DEBUG
#define FALSE 0
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
(void) get_clocks ();
gd->baudrate = 9600;
serial_init ();
trc_clocks, tctp_clocks;
unsigned char cal_index, cal_val, spd_version, spd_chksum;
unsigned char buf[8];
-#ifdef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-#endif
/* set up the config port */
mtdcr (ebccfga, pb7ap);
mtdcr (ebccfgd, CONFIG_PORT_AP);
long int initdram (int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long bank_reg[4], tmp, bank_size;
int i, ds;
unsigned long TotalSize;
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
#include "vcma9.h"
#include "../common/common_util.h"
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#define FCLK_SPEED 1
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr();
#include <pci.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
u32 get_BoardType (void);
#define PCI_CONFIG(b,d,f,r) cpu_to_le32(0x80000000 | ((b&0xff)<<16) \
}
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong busfreq = get_bus_freq (0);
char buf[32];
u32 BoardType = get_BoardType ();
/*#include <mc9328.h>*/
#include <asm/arch/imx-regs.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#define FCLK_SPEED 1
#if 0
-static inline void delay (unsigned long loops) {
+static inline void delay (unsigned long loops)
+{
__asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
}
#endif
* Miscellaneous platform dependent initialisations
*/
-void SetAsynchMode(void) {
- __asm__ (
- "mrc p15,0,r0,c1,c0,0 \n"
- "mov r2, #0xC0000000 \n"
- "orr r0,r2,r0 \n"
- "mcr p15,0,r0,c1,c0,0 \n"
- );
+void SetAsynchMode (void)
+{
+ __asm__ ("mrc p15,0,r0,c1,c0,0 \n"
+ "mov r2, #0xC0000000 \n"
+ "orr r0,r2,r0 \n" "mcr p15,0,r0,c1,c0,0 \n");
}
static u32 mc9328sid;
-int board_init (void) {
+int board_init (void)
+{
+ volatile unsigned int tmp;
- DECLARE_GLOBAL_DATA_PTR;
+ mc9328sid = SIDR;
- volatile unsigned int tmp;
+ GPCR = 0x000003AB; /* I/O pad driving strength */
- mc9328sid = SIDR;
-
- GPCR = 0x000003AB; /* I/O pad driving strength */
-
-/* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */
+ /* MX1_CS1U = 0x00000A00; *//* SRAM initialization */
/* MX1_CS1L = 0x11110601; */
- MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */
+ MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */
/* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and
* BCLK divider to 2 (i.e. BCLK to 48 MHz)
*/
- CSCR = 0xAF000403;
+ CSCR = 0xAF000403;
- CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */
- CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */
+ CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */
+ CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */
/* setup cs4 for cs8900 ethernet */
- CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */
- CS4L = 0x00001501;
+ CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */
+ CS4L = 0x00001501;
- GIUS(0) &= 0xFF3FFFFF;
- GPR(0) &= 0xFF3FFFFF;
+ GIUS (0) &= 0xFF3FFFFF;
+ GPR (0) &= 0xFF3FFFFF;
- tmp = *(unsigned int *)(0x1500000C);
- tmp = *(unsigned int *)(0x1500000C);
+ tmp = *(unsigned int *) (0x1500000C);
+ tmp = *(unsigned int *) (0x1500000C);
- SetAsynchMode();
+ SetAsynchMode ();
gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
- gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
- icache_enable();
- dcache_enable();
+ icache_enable ();
+ dcache_enable ();
/* set PERCLKs */
- PCDR = 0x00000055; /* set PERCLKS */
+ PCDR = 0x00000055; /* set PERCLKS */
/* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes
* PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place
return 0;
}
-int board_late_init(void) {
-
- setenv("stdout", "serial");
- setenv("stderr", "serial");
-
- switch (mc9328sid) {
- case 0x0005901d :
- printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n",mc9328sid);
- break;
- case 0x04d4c01d :
- printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n",mc9328sid);
- break;
- case 0x00d4c01d :
- printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n",mc9328sid);
- break;
-
- default :
- printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n",mc9328sid);
- break;
+int board_late_init (void)
+{
+
+ setenv ("stdout", "serial");
+ setenv ("stderr", "serial");
+
+ switch (mc9328sid) {
+ case 0x0005901d:
+ printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n",
+ mc9328sid);
+ break;
+ case 0x04d4c01d:
+ printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n",
+ mc9328sid);
+ break;
+ case 0x00d4c01d:
+ printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n",
+ mc9328sid);
+ break;
+
+ default:
+ printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n",
+ mc9328sid);
+ break;
}
return 0;
}
-int dram_init (void) {
- DECLARE_GLOBAL_DATA_PTR;
-
+int dram_init (void)
+{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return 0;
}
*/
#include <common.h>
-
#include <asm/arch/imx-regs.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
extern void imx_gpio_mode(int gpio_mode);
int
board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_arch_number = MACH_TYPE_MX1FS2;
gd->bd->bi_boot_params = 0x08000100;
serial_init();
int
dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if ( CONFIG_NR_DRAM_BANKS > 0 )
gd->bd->bi_dram[0].start = MX1FS2_SDRAM_1;
gd->bd->bi_dram[0].size = MX1FS2_SDRAM_1_SIZE;
#include <common.h>
#include <mpc8xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
#define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
OR_SCY_2_CLK | OR_EHTR | OR_BI)
#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
int scy, trlx, flash_or_timing, clk_diff;
- DECLARE_GLOBAL_DATA_PTR;
-
scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
trlx = OR_TRLX;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of NetStar board */
/* TODO: use define from asm/mach-types.h */
gd->bd->bi_arch_number = 692;
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
# include <./ns9750_bbus.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
void flash__init( void );
void ether__init( void );
int board_init( void )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Active BBUS modules */
*get_bbus_reg_addr( NS9750_BBUS_MASTER_RESET ) = 0;
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <malloc.h>
#include <mpc8xx.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
static long int dram_size (long int, long int *, long int);
-/* ------------------------------------------------------------------------- */
-
#define _NOT_USED_ 0xFFFFFFFF
const uint sdram_table[] = {
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char tmp[50];
u_char *e = gd->bd->bi_enetaddr;
void load_sernum_ethaddr (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void flash__init (void);
static void ether__init (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of OMAP 1510-Board */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_INNOVATOR;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <./configs/omap1510.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_CS_AUTOBOOT
unsigned long omap_flash_base;
#endif
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (machine_is_omap_h2())
gd->bd->bi_arch_number = MACH_TYPE_OMAP_H2;
else if (machine_is_omap_innovator())
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
#endif
- void wait_for_command_complete(unsigned int wd_base);
+DECLARE_GLOBAL_DATA_PTR;
+
+void wait_for_command_complete(unsigned int wd_base);
/*******************************************************
* Routine: delay
*****************************************/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRM, finish GPMC */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_H4; /* board id for linux */
**********************************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned int size0=0,size1=0;
u32 mtype, btype, rev, cpu;
u8 chg_on = 0x5; /* enable charge of back up battery */
#include <./configs/omap1510.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
void flash__init (void);
void ether__init (void);
void set_muxconf_regs (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
/* adress of boot parameters */
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <./configs/omap730.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
int test_boot_mode(void);
void spin_up_leds(void);
void flash__init (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of OMAP 730 P2 Board - Same as the Innovator! */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
******************************/
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <pci.h>
#include <i2c.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard (void)
{
puts ( "Board: OXC8240\n" );
#ifdef CFG_OXC_GENERATE_IP
{
- DECLARE_GLOBAL_DATA_PTR;
-
char str[32];
unsigned long ip = CFG_OXC_IPMASK;
bd_t *bd = gd->bd;
#include "hardware.h"
#include "pcippc2.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* 8 data, 1 stop, no parity
*/
#define LCRVAL 0x03
void fpga_serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int clock_divisor = 115200 / gd->baudrate;
fpga_serial_wait ();
#include "sconsole.h"
#include "fpga_serial.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_WATCHDOG)
static int pcippc2_wdt_init_done = 0;
void after_reloc (ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Jump to the main U-Boot board init code
*/
board_init_r ((gd_t *)gd, dest_addr);
#include "sconsole.h"
+DECLARE_GLOBAL_DATA_PTR;
+
void (*sconsole_putc) (char) = 0;
void (*sconsole_puts) (const char *) = 0;
int (*sconsole_getc) (void) = 0;
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
sconsole_buffer_t *sb = SCONSOLE_BUFFER;
sb->pos = 0;
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (sconsole_setbrg) {
(*sconsole_setbrg) ();
} else {
#include <common.h>
#include <asm-arm/mach-types.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include "mt48lc16m16a2-75.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifndef CFG_RAMBOOT
static void sdram_start (int hi_addr)
{
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start */
gd->bd->bi_flashstart = flash_info[0].start[0];
return (0);
#include "pn62.h"
+DECLARE_GLOBAL_DATA_PTR;
static int get_serial_number (char *string, int size);
static int get_mac_address (int id, u8 * mac, char *string, int size);
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char str[20];
u8 mac[6];
#include "p3p440.h"
+DECLARE_GLOBAL_DATA_PTR;
+
void set_led(int color)
{
switch (color) {
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*
* Adjust flash start and offset to detected values
*/
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
#include <common.h>
#include <command.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
memctl->memc_mamr = mamr_value;
for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = base + cnt; /* pointer arith! */
+ addr = (volatile ulong *)(base + cnt); /* pointer arith! */
save[i++] = *addr;
*addr = ~cnt;
}
/* write 0 to base address */
- addr = base;
+ addr = (volatile ulong *)base;
save[i] = *addr;
*addr = 0;
}
for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = base + cnt; /* pointer arith! */
+ addr = (volatile ulong *)(base + cnt); /* pointer arith! */
val = *addr;
*addr = save[--i];
#include <devices.h>
#include <lcd.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define SMC_INDEX 0
#define PROFF_SMC PROFF_SMC1
#define CPM_CR_CH_SMC CPM_CR_CH_SMC1
void smc1_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *im = (immap_t *)CFG_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
#include "clkinit.h"
+DECLARE_GLOBAL_DATA_PTR;
+
int Daq64xSampling = 0;
uint Daq_BRG_Rate(uint brg)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *)CFG_IMMR;
uint *brg_ptr;
uint brg_cnt;
void Daq_Init_Clocks(int sample_rate, int sample_64x)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */);
uint mclk_divisor; /* MCLK divisor */
int flag; /* Interrupt state */
#include "ppc440gx_i2c.h"
#include "sb_common.h"
+DECLARE_GLOBAL_DATA_PTR;
+
long int fixed_sdram (void);
/*************************************************************************
long dram_size = 0;
#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
+ dram_size = spd_sdram ();
#else
dram_size = fixed_sdram ();
#endif
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
long int initdram (int board_type)
{
- return spd_sdram (0);
+ return spd_sdram ();
}
/* ------------------------------------------------------------------------- */
#include <asm/processor.h>
#include <pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define BOARD_REV_REG 0xFE80002B
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char revision = *(volatile char *)(BOARD_REV_REG);
char buf[32];
#include <asm/ic/ali512x.h>
#include <spi.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#undef SC520_CDP_DEBUG
#ifdef SC520_CDP_DEBUG
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
init_sc520();
bus_init();
irq_init();
#include <asm/pci.h>
#include <asm/ic/sc520.h>
-
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Theory:
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
init_sc520();
bus_init();
irq_init();
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SHOW_BOOT_PROGRESS
# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
#else
# define SHOW_BOOT_PROGRESS(arg)
#endif
-int board_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
- gd->bd->bi_arch_number = MACH_TYPE_SCB9328;
- gd->bd->bi_boot_params = 0x08000100;
+int board_init (void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_SCB9328;
+ gd->bd->bi_boot_params = 0x08000100;
- return 0;
+ return 0;
}
-int dram_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
+int dram_init (void)
+{
#if ( CONFIG_NR_DRAM_BANKS > 0 )
- gd->bd->bi_dram[0].start = SCB9328_SDRAM_1;
- gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE;
+ gd->bd->bi_dram[0].start = SCB9328_SDRAM_1;
+ gd->bd->bi_dram[0].size = SCB9328_SDRAM_1_SIZE;
#endif
#if ( CONFIG_NR_DRAM_BANKS > 1 )
- gd->bd->bi_dram[1].start = SCB9328_SDRAM_2;
- gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE;
+ gd->bd->bi_dram[1].start = SCB9328_SDRAM_2;
+ gd->bd->bi_dram[1].size = SCB9328_SDRAM_2_SIZE;
#endif
#if ( CONFIG_NR_DRAM_BANKS > 2 )
- gd->bd->bi_dram[2].start = SCB9328_SDRAM_3;
- gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE;
+ gd->bd->bi_dram[2].start = SCB9328_SDRAM_3;
+ gd->bd->bi_dram[2].size = SCB9328_SDRAM_3_SIZE;
#endif
#if ( CONFIG_NR_DRAM_BANKS > 3 )
- gd->bd->bi_dram[3].start = SCB9328_SDRAM_4;
- gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE;
+ gd->bd->bi_dram[3].start = SCB9328_SDRAM_4;
+ gd->bd->bi_dram[3].size = SCB9328_SDRAM_4_SIZE;
#endif
-
- return 0;
+ return 0;
}
/**
#include <common.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* but if we use InfernoLoader, we must do some inits here */
{
#if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
#endif
#include "scm.h"
+DECLARE_GLOBAL_DATA_PTR;
+
static void config_scoh_cs(void);
extern int fpga_init(void);
*/
int power_on_reset (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Test Reset Status Register */
return gd->reset_status & RSR_CSRS ? 0 : 1;
}
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#define ORMASK(size) ((-size) & OR_AM_MSK)
static long ram_size(ulong *, long);
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
char* s;
#include <common.h>
#include <s3c2400.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_MODEM_SUPPORT
static int key_pressed(void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <common.h>
#include <s3c2410.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#define FCLK_SPEED 1
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <asm/mem_init.h>
#include "stamp.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define STATUS_LED_OFF 0
#define STATUS_LED_ON 1
long int initdram (int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
printf ("SDRAM attributes:\n");
printf (" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; "
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void flash__init (void);
static void ether__init (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* arch number of SX1 Board */
gd->bd->bi_arch_number = MACH_TYPE_SX1;
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <asm-ppc/mmu.h>
#include <pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define IOSYNC asm("eieio")
#define ISYNC asm("isync")
#define SYNC asm("sync")
puts("Board: TQM834x\n");
#ifdef CONFIG_PCI
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t * immr;
u32 w, f;
#include <spd.h>
#include <flash.h>
+DECLARE_GLOBAL_DATA_PTR;
+
extern flash_info_t flash_info[]; /* FLASH chips info */
void local_bus_init (void);
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_lbc_t *memctl = &immap->im_lbc;
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M)
# ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
# define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \
#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
int scy, trlx, flash_or_timing, clk_diff;
- DECLARE_GLOBAL_DATA_PTR;
-
scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
trlx = OR_TRLX;
#include <ps2mult.h>
#endif
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
static long int dram_size (long int, long int *, long int);
-/* ------------------------------------------------------------------------- */
-
#define _NOT_USED_ 0xFFFFFFFF
const uint sdram_table[] =
int checkboard (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char *s = getenv ("serial#");
puts ("Board: ");
}
#if 0
+DECLARE_GLOBAL_DATA_PTR;
+
int memory_post_test (int flags)
{
int ret = 0;
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
256 << 20 : bd->bi_memsize) - (1 << 20);
#include <s3c2400.h>
#include <command.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#ifdef CFG_BRIGHTNESS
static void spi_init(void);
#define KBD_MDELAY 5000
static void udelay_no_timer (int usec)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
int delay = usec * 3;
#if defined(CONFIG_VFD)
extern int vfd_init_clocks(void);
#endif
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return 0;
#include <devices.h>
#include <s3c2400.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_VFD
/************************************************************************/
*/
void init_grid_ctrl(void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong adr, grid_cycle;
unsigned int bit, display;
unsigned char temp, bit_nr;
*/
void create_vfd_table(void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long vfd_table[112][18][2][4][2];
unsigned int x, y, color, display, entry, pixel;
unsigned int x_abcdef = 0;
unsigned char color, unsigned char display,
unsigned char value)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong adr;
unsigned char bit_nr, temp;
static int vfd_init_done = 0;
int vfd_inv_data = 0;
- DECLARE_GLOBAL_DATA_PTR;
-
if (vfd_init_done != 0)
return (0);
vfd_init_done = 1;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
-
/*
* set clock frequency:
* VERSATILE_REFCLK is 32KHz
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
*((volatile unsigned char *) VOICEBLUE_LED_REG) = 0xaa;
/* arch number of VoiceBlue board */
int dram_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
*((volatile unsigned short *) VOICEBLUE_LED_REG) = 0xff;
/* Take the Ethernet controller out of reset and wait
#include <common.h>
#include <asm/arch/pxa-regs.h>
-int board_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
+DECLARE_GLOBAL_DATA_PTR;
- gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250;
- gd->bd->bi_boot_params = 0xa0000000;
+int board_init (void)
+{
+ gd->bd->bi_arch_number = MACH_TYPE_WEP_EP250;
+ gd->bd->bi_boot_params = 0xa0000000;
/*
* Setup GPIO stuff to get serial working
*/
#if defined( CONFIG_FFUART )
- GPDR1 = 0x80;
- GAFR1_L = 0x8010;
+ GPDR1 = 0x80;
+ GAFR1_L = 0x8010;
#elif defined( CONFIG_BTUART )
- GPDR1 = 0x800;
- GAFR1_L = 0x900000;
+ GPDR1 = 0x800;
+ GAFR1_L = 0x900000;
#endif
- PSSR = 0x20;
+ PSSR = 0x20;
- return 0;
+ return 0;
}
-int dram_init( void ){
- DECLARE_GLOBAL_DATA_PTR;
-
+int dram_init (void)
+{
#if ( CONFIG_NR_DRAM_BANKS > 0 )
- gd->bd->bi_dram[0].start = WEP_SDRAM_1;
- gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE;
+ gd->bd->bi_dram[0].start = WEP_SDRAM_1;
+ gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE;
#endif
#if ( CONFIG_NR_DRAM_BANKS > 1 )
- gd->bd->bi_dram[1].start = WEP_SDRAM_2;
- gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE;
+ gd->bd->bi_dram[1].start = WEP_SDRAM_2;
+ gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE;
#endif
#if ( CONFIG_NR_DRAM_BANKS > 2 )
- gd->bd->bi_dram[2].start = WEP_SDRAM_3;
- gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE;
+ gd->bd->bi_dram[2].start = WEP_SDRAM_3;
+ gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE;
#endif
#if ( CONFIG_NR_DRAM_BANKS > 3 )
- gd->bd->bi_dram[3].start = WEP_SDRAM_4;
- gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE;
+ gd->bd->bi_dram[3].start = WEP_SDRAM_4;
+ gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE;
#endif
- return 0;
+ return 0;
}
#include <common.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
/* gd->bd->bi_dram[1].start = PHYS_SDRAM_2;*/
#include <configs/ml300.h>
#include "xparameters.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define USE_CHAN1 \
((defined XPAR_UARTNS550_0_BASEADDR) && (defined CFG_INIT_CHAN1))
#define USE_CHAN2 \
serial_init(void)
{
#if USE_CHAN1
- DECLARE_GLOBAL_DATA_PTR;
int clock_divisor;
clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
serial_setbrg(void)
{
#if USE_CHAN1
- DECLARE_GLOBAL_DATA_PTR;
int clock_divisor;
clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
#include <asm/arch/pxa-regs.h>
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* local prototypes */
board_init (void)
/**********************************************************/
{
- DECLARE_GLOBAL_DATA_PTR;
/* arch number of MicroSys XM250 */
gd->bd->bi_arch_number = MACH_TYPE_XM250;
dram_init (void)
/**********************************************************/
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <spd_sdram.h>
#include <i2c.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define BOOT_SMALL_FLASH 32 /* 00100000 */
#define FLASH_ONBD_N 2 /* 00000010 */
#define FLASH_SRAM_SEL 1 /* 00000001 */
long dram_size = 0;
#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram (0);
+ dram_size = spd_sdram ();
#else
dram_size = fixed_sdram ();
#endif
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#include <common.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
#include <command.h>
#include <net.h> /* for print_IPaddr */
+DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_COMMANDS & CFG_CMD_BDI)
static void print_num(const char *, ulong);
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
char buf[32];
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i;
bd_t *bd = gd->bd;
#include <bedbug/regs.h>
#include <bedbug/ppc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
#ifndef MAX
#define MAX(a,b) ((a) > (b) ? (a) : (b))
#endif
-extern void show_regs __P((struct pt_regs*));
-extern int run_command __P((const char*, int));
+extern void show_regs __P ((struct pt_regs *));
+extern int run_command __P ((const char *, int));
extern char console_buffer[];
-ulong dis_last_addr = 0; /* Last address disassembled */
-ulong dis_last_len = 20; /* Default disassembler length */
-CPU_DEBUG_CTX bug_ctx; /* Bedbug context structure */
-
+ulong dis_last_addr = 0; /* Last address disassembled */
+ulong dis_last_len = 20; /* Default disassembler length */
+CPU_DEBUG_CTX bug_ctx; /* Bedbug context structure */
\f
+
/* ======================================================================
* U-Boot's puts function does not append a newline, so the bedbug stuff
* will use this for the output of the dis/assembler.
* ====================================================================== */
-int bedbug_puts(const char *str)
+int bedbug_puts (const char *str)
{
- /* -------------------------------------------------- */
+ /* -------------------------------------------------- */
- printf( "%s\r\n", str );
- return 0;
-} /* bedbug_puts */
+ printf ("%s\r\n", str);
+ return 0;
+} /* bedbug_puts */
+\f
-\f
/* ======================================================================
* Initialize the bug_ctx structure used by the bedbug debugger. This is
* specific to the CPU since each has different debug registers and
* settings.
* ====================================================================== */
-void bedbug_init( void )
+void bedbug_init (void)
{
- /* -------------------------------------------------- */
+ /* -------------------------------------------------- */
#if defined(CONFIG_4xx)
- void bedbug405_init( void );
- bedbug405_init();
+ void bedbug405_init (void);
+
+ bedbug405_init ();
#elif defined(CONFIG_8xx)
- void bedbug860_init( void );
- bedbug860_init();
+ void bedbug860_init (void);
+
+ bedbug860_init ();
#endif
#if defined(CONFIG_MPC824X) || defined(CONFIG_MPC8260)
- /* Processors that are 603e core based */
- void bedbug603e_init( void );
+ /* Processors that are 603e core based */
+ void bedbug603e_init (void);
- bedbug603e_init();
+ bedbug603e_init ();
#endif
- return;
-} /* bedbug_init */
+ return;
+} /* bedbug_init */
+\f
-\f
/* ======================================================================
* Entry point from the interpreter to the disassembler. Repeated calls
* will resume from the last disassembled address.
* ====================================================================== */
-int do_bedbug_dis (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- ulong addr; /* Address to start disassembly from */
- ulong len; /* # of instructions to disassemble */
- /* -------------------------------------------------- */
-
- /* Setup to go from the last address if none is given */
- addr = dis_last_addr;
- len = dis_last_len;
-
- if (argc < 2)
- {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if(( flag & CMD_FLAG_REPEAT ) == 0 )
- {
- /* New command */
- addr = simple_strtoul( argv[1], NULL, 16 );
-
- /* If an extra param is given then it is the length */
- if( argc > 2 )
- len = simple_strtoul( argv[2], NULL, 16 );
- }
-
- /* Run the disassembler */
- disppc( (unsigned char *)addr, 0, len, bedbug_puts, F_RADHEX );
-
- dis_last_addr = addr + (len * 4);
- dis_last_len = len;
- return 0;
-} /* do_bedbug_dis */
-U_BOOT_CMD(
- ds, 3, 1, do_bedbug_dis,
- "ds - disassemble memory\n",
- "ds <address> [# instructions]\n"
-);
+ ulong addr; /* Address to start disassembly from */
+ ulong len; /* # of instructions to disassemble */
+
+ /* -------------------------------------------------- */
+
+ /* Setup to go from the last address if none is given */
+ addr = dis_last_addr;
+ len = dis_last_len;
+
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if ((flag & CMD_FLAG_REPEAT) == 0) {
+ /* New command */
+ addr = simple_strtoul (argv[1], NULL, 16);
+
+ /* If an extra param is given then it is the length */
+ if (argc > 2)
+ len = simple_strtoul (argv[2], NULL, 16);
+ }
+
+ /* Run the disassembler */
+ disppc ((unsigned char *) addr, 0, len, bedbug_puts, F_RADHEX);
+
+ dis_last_addr = addr + (len * 4);
+ dis_last_len = len;
+ return 0;
+} /* do_bedbug_dis */
+
+U_BOOT_CMD (ds, 3, 1, do_bedbug_dis,
+ "ds - disassemble memory\n",
+ "ds <address> [# instructions]\n");
\f
/* ======================================================================
* Entry point from the interpreter to the assembler. Assembles
* instructions in consecutive memory locations until a '.' (period) is
* entered on a line by itself.
* ====================================================================== */
-int do_bedbug_asm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- long mem_addr; /* Address to assemble into */
- unsigned long instr; /* Machine code for text */
- char prompt[ 15 ]; /* Prompt string for user input */
- int asm_err; /* Error code from the assembler*/
- /* -------------------------------------------------- */
- int rcode = 0;
-
- if (argc < 2)
- {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- printf( "\nEnter '.' when done\n" );
- mem_addr = simple_strtoul( argv[ 1 ], NULL, 16 );
-
- while( 1 )
- {
- putc( '\n' );
- disppc( (unsigned char *)mem_addr, 0, 1, bedbug_puts, F_RADHEX );
-
- sprintf( prompt, "%08lx: ", mem_addr );
- readline( prompt );
-
- if( console_buffer[ 0 ] && strcmp( console_buffer, "." ))
- {
- if(( instr = asmppc( mem_addr, console_buffer, &asm_err )) != 0 )
- {
- *(unsigned long *)mem_addr = instr;
- mem_addr += 4;
- }
- else
- {
- printf( "*** Error: %s ***\n", asm_error_str( asm_err ));
- rcode = 1;
- }
- }
- else
- {
- break;
- }
- }
- return rcode;
-} /* do_bedbug_asm */
-U_BOOT_CMD(
- as, 2, 0, do_bedbug_asm,
- "as - assemble memory\n",
- "as <address>\n"
-);
+ long mem_addr; /* Address to assemble into */
+ unsigned long instr; /* Machine code for text */
+ char prompt[15]; /* Prompt string for user input */
+ int asm_err; /* Error code from the assembler */
+
+ /* -------------------------------------------------- */
+ int rcode = 0;
+
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ printf ("\nEnter '.' when done\n");
+ mem_addr = simple_strtoul (argv[1], NULL, 16);
+
+ while (1) {
+ putc ('\n');
+ disppc ((unsigned char *) mem_addr, 0, 1, bedbug_puts,
+ F_RADHEX);
+
+ sprintf (prompt, "%08lx: ", mem_addr);
+ readline (prompt);
+
+ if (console_buffer[0] && strcmp (console_buffer, ".")) {
+ if ((instr =
+ asmppc (mem_addr, console_buffer,
+ &asm_err)) != 0) {
+ *(unsigned long *) mem_addr = instr;
+ mem_addr += 4;
+ } else {
+ printf ("*** Error: %s ***\n",
+ asm_error_str (asm_err));
+ rcode = 1;
+ }
+ } else {
+ break;
+ }
+ }
+ return rcode;
+} /* do_bedbug_asm */
+
+U_BOOT_CMD (as, 2, 0, do_bedbug_asm,
+ "as - assemble memory\n", "as <address>\n");
\f
/* ======================================================================
* Used to set a break point from the interpreter. Simply calls into the
* CPU-specific break point set routine.
* ====================================================================== */
-int do_bedbug_break (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* -------------------------------------------------- */
- if( bug_ctx.do_break )
- (*bug_ctx.do_break)( cmdtp, flag, argc, argv );
- return 0;
-
-} /* do_bedbug_break */
-U_BOOT_CMD(
- break, 3, 0, do_bedbug_break,
- "break - set or clear a breakpoint\n",
- " - Set or clear a breakpoint\n"
- "break <address> - Break at an address\n"
- "break off <bp#> - Disable breakpoint.\n"
- "break show - List breakpoints.\n"
-);
+ /* -------------------------------------------------- */
+ if (bug_ctx.do_break)
+ (*bug_ctx.do_break) (cmdtp, flag, argc, argv);
+ return 0;
+
+} /* do_bedbug_break */
+
+U_BOOT_CMD (break, 3, 0, do_bedbug_break,
+ "break - set or clear a breakpoint\n",
+ " - Set or clear a breakpoint\n"
+ "break <address> - Break at an address\n"
+ "break off <bp#> - Disable breakpoint.\n"
+ "break show - List breakpoints.\n");
\f
/* ======================================================================
* Called from the debug interrupt routine. Simply calls the CPU-specific
void do_bedbug_breakpoint (struct pt_regs *regs)
{
- /* -------------------------------------------------- */
+ /* -------------------------------------------------- */
- if( bug_ctx.break_isr )
- (*bug_ctx.break_isr)( regs );
+ if (bug_ctx.break_isr)
+ (*bug_ctx.break_isr) (regs);
- return;
-} /* do_bedbug_breakpoint */
+ return;
+} /* do_bedbug_breakpoint */
+\f
-\f
/* ======================================================================
* Called from the CPU-specific breakpoint handling routine. Enter a
* mini main loop until the stopped flag is cleared from the breakpoint
* This handles the parts of the debugger that are common to all CPU's.
* ====================================================================== */
-void bedbug_main_loop( unsigned long addr, struct pt_regs *regs )
+void bedbug_main_loop (unsigned long addr, struct pt_regs *regs)
{
- int len; /* Length of command line */
- int flag; /* Command flags */
- int rc = 0; /* Result from run_command*/
- char prompt_str[ 20 ]; /* Prompt string */
- static char lastcommand[ CFG_CBSIZE ] = {0}; /* previous command */
- /* -------------------------------------------------- */
+ int len; /* Length of command line */
+ int flag; /* Command flags */
+ int rc = 0; /* Result from run_command */
+ char prompt_str[20]; /* Prompt string */
+ static char lastcommand[CFG_CBSIZE] = { 0 }; /* previous command */
+ /* -------------------------------------------------- */
- if( bug_ctx.clear )
- (*bug_ctx.clear)( bug_ctx.current_bp );
+ if (bug_ctx.clear)
+ (*bug_ctx.clear) (bug_ctx.current_bp);
- printf( "Breakpoint %d: ", bug_ctx.current_bp );
- disppc( (unsigned char *)addr, 0, 1, bedbug_puts, F_RADHEX );
+ printf ("Breakpoint %d: ", bug_ctx.current_bp);
+ disppc ((unsigned char *) addr, 0, 1, bedbug_puts, F_RADHEX);
- bug_ctx.stopped = 1;
- bug_ctx.regs = regs;
+ bug_ctx.stopped = 1;
+ bug_ctx.regs = regs;
- sprintf( prompt_str, "BEDBUG.%d =>", bug_ctx.current_bp );
+ sprintf (prompt_str, "BEDBUG.%d =>", bug_ctx.current_bp);
- /* A miniature main loop */
- while( bug_ctx.stopped )
- {
- len = readline( prompt_str );
+ /* A miniature main loop */
+ while (bug_ctx.stopped) {
+ len = readline (prompt_str);
- flag = 0; /* assume no special flags for now */
+ flag = 0; /* assume no special flags for now */
- if (len > 0)
- strcpy( lastcommand, console_buffer );
- else if( len == 0 )
- flag |= CMD_FLAG_REPEAT;
+ if (len > 0)
+ strcpy (lastcommand, console_buffer);
+ else if (len == 0)
+ flag |= CMD_FLAG_REPEAT;
- if (len == -1)
- printf ("<INTERRUPT>\n");
- else
- rc = run_command( lastcommand, flag );
+ if (len == -1)
+ printf ("<INTERRUPT>\n");
+ else
+ rc = run_command (lastcommand, flag);
- if (rc <= 0) {
- /* invalid command or not repeatable, forget it */
- lastcommand[0] = 0;
- }
- }
+ if (rc <= 0) {
+ /* invalid command or not repeatable, forget it */
+ lastcommand[0] = 0;
+ }
+ }
- bug_ctx.regs = NULL;
- bug_ctx.current_bp = 0;
+ bug_ctx.regs = NULL;
+ bug_ctx.current_bp = 0;
- return;
-} /* bedbug_main_loop */
+ return;
+} /* bedbug_main_loop */
+\f
-\f
/* ======================================================================
* Interpreter command to continue from a breakpoint. Just clears the
* stopped flag in the context so that the breakpoint routine will
* return.
* ====================================================================== */
-int do_bedbug_continue (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-
+int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- bug_ctx.stopped = 0;
- return 0;
-} /* do_bedbug_continue */
-U_BOOT_CMD(
- continue, 1, 0, do_bedbug_continue,
- "continue- continue from a breakpoint\n",
- " - continue from a breakpoint.\n"
-);
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ bug_ctx.stopped = 0;
+ return 0;
+} /* do_bedbug_continue */
+
+U_BOOT_CMD (continue, 1, 0, do_bedbug_continue,
+ "continue- continue from a breakpoint\n",
+ " - continue from a breakpoint.\n");
\f
/* ======================================================================
* Interpreter command to continue to the next instruction, stepping into
* the address passes control to the CPU-specific set breakpoint routine
* for the current breakpoint number.
* ====================================================================== */
-int do_bedbug_step (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- unsigned long addr; /* Address to stop at */
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- if( !find_next_address( (unsigned char *)&addr, FALSE, bug_ctx.regs ))
- return 1;
-
- if( bug_ctx.set )
- (*bug_ctx.set)( bug_ctx.current_bp, addr );
-
- bug_ctx.stopped = 0;
- return 0;
-} /* do_bedbug_step */
-U_BOOT_CMD(
- step, 1, 1, do_bedbug_step,
- "step - single step execution.\n",
- " - single step execution.\n"
-);
+ unsigned long addr; /* Address to stop at */
+
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ if (!find_next_address ((unsigned char *) &addr, FALSE, bug_ctx.regs))
+ return 1;
+
+ if (bug_ctx.set)
+ (*bug_ctx.set) (bug_ctx.current_bp, addr);
+
+ bug_ctx.stopped = 0;
+ return 0;
+} /* do_bedbug_step */
+
+U_BOOT_CMD (step, 1, 1, do_bedbug_step,
+ "step - single step execution.\n",
+ " - single step execution.\n");
\f
/* ======================================================================
* Interpreter command to continue to the next instruction, stepping over
* the address passes control to the CPU-specific set breakpoint routine
* for the current breakpoint number.
* ====================================================================== */
-int do_bedbug_next (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- unsigned long addr; /* Address to stop at */
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- if( !find_next_address( (unsigned char *)&addr, TRUE, bug_ctx.regs ))
- return 1;
-
- if( bug_ctx.set )
- (*bug_ctx.set)( bug_ctx.current_bp, addr );
-
- bug_ctx.stopped = 0;
- return 0;
-} /* do_bedbug_next */
-U_BOOT_CMD(
- next, 1, 1, do_bedbug_next,
- "next - single step execution, stepping over subroutines.\n",
- " - single step execution, stepping over subroutines.\n"
-);
+ unsigned long addr; /* Address to stop at */
+
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ if (!find_next_address ((unsigned char *) &addr, TRUE, bug_ctx.regs))
+ return 1;
+
+ if (bug_ctx.set)
+ (*bug_ctx.set) (bug_ctx.current_bp, addr);
+
+ bug_ctx.stopped = 0;
+ return 0;
+} /* do_bedbug_next */
+
+U_BOOT_CMD (next, 1, 1, do_bedbug_next,
+ "next - single step execution, stepping over subroutines.\n",
+ " - single step execution, stepping over subroutines.\n");
\f
/* ======================================================================
* Interpreter command to print the current stack. This assumes an EABI
* architecture, so it starts with GPR R1 and works back up the stack.
* ====================================================================== */
-int do_bedbug_stack (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
- unsigned long sp; /* Stack pointer */
- unsigned long func; /* LR from stack */
- int depth; /* Stack iteration level */
- int skip = 1; /* Flag to skip the first entry */
- unsigned long top; /* Top of memory address */
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- top = gd->bd->bi_memstart + gd->bd->bi_memsize;
- depth = 0;
-
- printf( "Depth PC\n" );
- printf( "----- --------\n" );
- printf( "%5d %08lx\n", depth++, bug_ctx.regs->nip );
-
- sp = bug_ctx.regs->gpr[ 1 ];
- func = *(unsigned long *)(sp+4);
-
- while(( func < top ) && ( sp < top ))
- {
- if( !skip )
- printf( "%5d %08lx\n", depth++, func );
- else
- --skip;
-
- sp = *(unsigned long *)sp;
- func = *(unsigned long *)(sp+4);
- }
- return 0;
-} /* do_bedbug_stack */
-U_BOOT_CMD(
- where, 1, 1, do_bedbug_stack,
- "where - Print the running stack.\n",
- " - Print the running stack.\n"
-);
+ unsigned long sp; /* Stack pointer */
+ unsigned long func; /* LR from stack */
+ int depth; /* Stack iteration level */
+ int skip = 1; /* Flag to skip the first entry */
+ unsigned long top; /* Top of memory address */
+
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ top = gd->bd->bi_memstart + gd->bd->bi_memsize;
+ depth = 0;
+
+ printf ("Depth PC\n");
+ printf ("----- --------\n");
+ printf ("%5d %08lx\n", depth++, bug_ctx.regs->nip);
+
+ sp = bug_ctx.regs->gpr[1];
+ func = *(unsigned long *) (sp + 4);
+
+ while ((func < top) && (sp < top)) {
+ if (!skip)
+ printf ("%5d %08lx\n", depth++, func);
+ else
+ --skip;
+
+ sp = *(unsigned long *) sp;
+ func = *(unsigned long *) (sp + 4);
+ }
+ return 0;
+} /* do_bedbug_stack */
+
+U_BOOT_CMD (where, 1, 1, do_bedbug_stack,
+ "where - Print the running stack.\n",
+ " - Print the running stack.\n");
\f
/* ======================================================================
* Interpreter command to dump the registers. Calls the CPU-specific
* show registers routine.
* ====================================================================== */
-int do_bedbug_rdump (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- /* -------------------------------------------------- */
-
- if( ! bug_ctx.stopped )
- {
- printf( "Not at a breakpoint\n" );
- return 1;
- }
-
- show_regs( bug_ctx.regs );
- return 0;
-} /* do_bedbug_rdump */
-U_BOOT_CMD(
- rdump, 1, 1, do_bedbug_rdump,
- "rdump - Show registers.\n",
- " - Show registers.\n"
-);
+ /* -------------------------------------------------- */
+
+ if (!bug_ctx.stopped) {
+ printf ("Not at a breakpoint\n");
+ return 1;
+ }
+
+ show_regs (bug_ctx.regs);
+ return 0;
+} /* do_bedbug_rdump */
+
+U_BOOT_CMD (rdump, 1, 1, do_bedbug_rdump,
+ "rdump - Show registers.\n", " - Show registers.\n");
/* ====================================================================== */
-#endif /* CFG_CMD_BEDBUG */
+#endif /* CFG_CMD_BEDBUG */
/*
#include <command.h>
#include <net.h>
-
-/* -------------------------------------------------------------------- */
+#if defined(CONFIG_I386)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
-#if defined(CONFIG_I386)
- DECLARE_GLOBAL_DATA_PTR;
-#endif
ulong addr, rc;
int rcode = 0;
#include <ft_build.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
static void
fixup_silent_linux ()
{
- DECLARE_GLOBAL_DATA_PTR;
char buf[256], *start, *end;
char *cmdline = getenv ("bootargs");
ulong *len_ptr,
int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong sp;
ulong len, checksum;
ulong initrd_start, initrd_end;
ulong *len_ptr,
int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
image_header_t *hdr = &header;
void (*loader)(bd_t *, image_header_t *, char *, char *);
ulong *len_ptr,
int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong top;
char *s, *cmdline;
char **fwenv, **ss;
do_bootm_rtems (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong *len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
image_header_t *hdr = &header;
void (*entry_point)(bd_t *);
#include <command.h>
#include <rtc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_DATE)
const char *weekdays[] = {
int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
struct rtc_time tm;
int rcode = 0;
#include <net.h>
#include <elf.h>
+#if defined(CONFIG_WALNUT) || defined(CFG_VXWORKS_MAC_PTR)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
#if (CONFIG_COMMANDS & CFG_CMD_ELF)
* ====================================================================== */
int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
-#if defined(CONFIG_WALNUT) || \
- defined(CFG_VXWORKS_MAC_PTR)
- DECLARE_GLOBAL_DATA_PTR;
-#endif
-
unsigned long addr; /* Address of image */
unsigned long bootaddr; /* Address to put the bootline */
char *bootline; /* Text of the bootline */
# define SHOW_BOOT_PROGRESS(arg)
#endif
+#ifdef CONFIG_IDE_8xx_DIRECT
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#ifdef __PPC__
# define EIEIO __asm__ volatile ("eieio")
# define SYNC __asm__ volatile ("sync")
{
#ifdef CONFIG_IDE_8xx_DIRECT
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
#endif
#include <asm/iopin_8260.h>
#endif
+#if defined(CONFIG_8xx) || defined(CONFIG_8260)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
static void
unimplemented ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
uint div16 = (val & CPM_BRG_DIV16) != 0;
#if defined(CONFIG_8xx)
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->cpu_clk;
#elif defined(CONFIG_8260)
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->brg_clk;
#endif
#include <net.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_COMMANDS & CFG_CMD_LOADS)
static ulong load_serial (ulong offset);
char *env_echo;
int rcode = 0;
#ifdef CFG_LOADS_BAUD_CHANGE
- DECLARE_GLOBAL_DATA_PTR;
int load_baudrate, current_baudrate;
load_baudrate = current_baudrate = gd->baudrate;
static int
read_record (char *buf, ulong len)
{
- DECLARE_GLOBAL_DATA_PTR;
char *p;
char c;
ulong offset = 0;
ulong size = 0;
#ifdef CFG_LOADS_BAUD_CHANGE
- DECLARE_GLOBAL_DATA_PTR;
int save_baudrate, current_baudrate;
save_baudrate = current_baudrate = gd->baudrate;
int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong offset = 0;
ulong addr;
int load_baudrate, current_baudrate;
#include <post.h>
#include <logbuff.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_LOGBUFFER)
/* Local prototypes */
in linux/kernel/printk */
void logbuff_init_ptrs (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long *ext_tag;
unsigned long post_word;
char *s;
void logbuff_log(char *msg)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if ((gd->post_log_word & LOGBUFF_INITIALIZED)) {
logbuff_printk (msg);
} else {
#include <net.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CFG_ENV_IS_IN_NVRAM) && \
!defined(CFG_ENV_IS_IN_EEPROM) && \
!defined(CFG_ENV_IS_IN_FLASH) && \
int _do_setenv (int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i, len, oldval;
int console = -1;
uchar *env, *nxt = NULL;
#include <console.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_AMIGAONEG3SE
int console_changed = 0;
#endif
static int console_setfile (int file, device_t * dev)
{
- DECLARE_GLOBAL_DATA_PTR;
int error = 0;
if (dev == NULL)
int getc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->flags & GD_FLG_DEVINIT) {
/* Get from the standard input */
return fgetc (stdin);
int tstc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->flags & GD_FLG_DEVINIT) {
/* Test the standard input */
return ftstc (stdin);
void putc (const char c)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_SILENT_CONSOLE
if (gd->flags & GD_FLG_SILENT)
return;
void puts (const char *s)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#ifdef CONFIG_SILENT_CONSOLE
if (gd->flags & GD_FLG_SILENT)
return;
static int ctrlc_was_pressed = 0;
int ctrlc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!ctrlc_disabled && gd->have_console) {
if (tstc ()) {
switch (getc ()) {
/* Called before relocation - use serial functions */
int console_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->have_console = 1;
#ifdef CONFIG_SILENT_CONSOLE
/* Called after the relocation - use desired console functions */
int console_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
char *stdinname, *stdoutname, *stderrname;
device_t *inputdev = NULL, *outputdev = NULL, *errdev = NULL;
#ifdef CFG_CONSOLE_ENV_OVERWRITE
/* Called after the relocation - use desired console functions */
int console_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
device_t *inputdev = NULL, *outputdev = NULL;
int i, items = ListNumItems (devlist);
#include <i2c.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
list_t devlist = 0;
device_t *stdio_devices[] = { NULL, NULL, NULL };
char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" };
int devices_init (void)
{
#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
- DECLARE_GLOBAL_DATA_PTR;
-
ulong relocation_offset = gd->reloc_off;
int i;
#endif /* 0 */ /* Moved to malloc.h */
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
Emulation of sbrk for WIN32
All code within the ifdef WIN32 is untested by me.
void malloc_bin_reloc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long *p = (unsigned long *)(&av_[2]);
int i;
for (i=2; i<(sizeof(av_)/sizeof(mbinptr)); ++i) {
# define SHOW_BOOT_PROGRESS(arg)
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_AMIGAONEG3SE
extern void enable_nvram(void);
extern void disable_nvram(void);
static uchar env_get_char_init (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
uchar c;
/* if crc was bad, use the default environment */
#ifdef CONFIG_AMIGAONEG3SE
uchar env_get_char_memory (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
uchar retval;
enable_nvram();
if (gd->env_valid) {
#else
uchar env_get_char_memory (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->env_valid) {
return ( *((uchar *)(gd->env_addr + index)) );
} else {
uchar *env_get_addr (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->env_valid) {
return ( ((uchar *)(gd->env_addr + index)) );
} else {
void env_relocate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
DEBUGF ("%s[%d] offset = 0x%lx\n", __FUNCTION__,__LINE__,
gd->reloc_off);
#include <linux/stddef.h>
#include <dataflash.h>
+DECLARE_GLOBAL_DATA_PTR;
+
env_t *env_ptr = NULL;
char * env_name_spec = "dataflash";
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong crc, len, new;
unsigned off;
uchar buf[64];
#include <environment.h>
#include <linux/stddef.h>
+DECLARE_GLOBAL_DATA_PTR;
+
env_t *env_ptr = NULL;
char * env_name_spec = "EEPROM";
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong crc, len, new;
unsigned off;
uchar buf[64];
#include <linux/stddef.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
#define CMD_SAVEENV
#elif defined(CFG_ENV_ADDR_REDUND)
uchar env_get_char_spec (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( *((uchar *)(gd->env_addr + index)) );
}
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
int crc1_ok = 0, crc2_ok = 0;
uchar flag1 = flash_addr->flags;
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_OMAP2420H4
int flash_probe(void);
{
#if !defined(ENV_IS_EMBEDDED) || defined(CFG_ENV_ADDR_REDUND)
#ifdef CFG_ENV_ADDR_REDUND
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->env_addr != (ulong)&(flash_addr->data)) {
env_t * etmp = flash_addr;
ulong ltmp = end_addr;
/* local functions */
static void use_default(void);
+DECLARE_GLOBAL_DATA_PTR;
uchar env_get_char_spec (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( *((uchar *)(gd->env_addr + index)) );
}
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 1;
ulong total;
int ret = 0;
- DECLARE_GLOBAL_DATA_PTR;
-
env_ptr->flags++;
total = CFG_ENV_SIZE;
int crc1_ok = 0, crc2_ok = 0;
env_t *tmp_env1, *tmp_env2;
- DECLARE_GLOBAL_DATA_PTR;
-
total = CFG_ENV_SIZE;
tmp_env1 = (env_t *) malloc(CFG_ENV_SIZE);
static void use_default()
{
- DECLARE_GLOBAL_DATA_PTR;
-
puts ("*** Warning - bad CRC or NAND, using default environment\n\n");
if (default_environment_size > CFG_ENV_SIZE){
#include <environment.h>
#include <linux/stddef.h>
+DECLARE_GLOBAL_DATA_PTR;
+
env_t *env_ptr = NULL;
extern uchar default_environment[];
uchar env_get_char_spec (int index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( *((uchar *)(gd->env_addr + index)) );
}
*/
int env_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CFG_ENV_IS_IN_NVRAM /* Environment is in NVRAM */
#include <command.h>
return c;
#else
- DECLARE_GLOBAL_DATA_PTR;
uchar retval;
enable_nvram();
retval = *((uchar *)(gd->env_addr + index));
return c;
#else
- DECLARE_GLOBAL_DATA_PTR;
-
return *((uchar *)(gd->env_addr + index));
#endif
}
*/
int env_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_AMIGAONEG3SE
enable_nvram();
#endif
#include <common.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void dummy(void)
{
}
void jumptable_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int i;
gd->jt = (void **) malloc (XF_MAX * sizeof (void *));
#endif
#ifdef __U_BOOT__
+DECLARE_GLOBAL_DATA_PTR;
+
#define EXIT_SUCCESS 0
#define EOF -1
#define syntax() syntax_err()
#ifdef __U_BOOT__
static void u_boot_hush_reloc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned long addr;
struct reserved_combo *r;
#include <lcdvideo.h>
#endif
-
#ifdef CONFIG_LCD
/************************************************************************/
# endif
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
ulong lcd_setmem (ulong addr);
static void lcd_drawchars (ushort x, ushort y, uchar *str, int count);
int drv_lcd_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
device_t lcddev;
int rc;
static void *lcd_logo (void)
{
#ifdef CONFIG_LCD_INFO
- DECLARE_GLOBAL_DATA_PTR;
-
char info[80];
char temp[32];
#endif /* CONFIG_LCD_INFO */
#if defined(CONFIG_LYNXKDI)
#include <lynxkdi.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_MPC8260) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
void lynxkdi_boot ( image_header_t *hdr )
{
void (*lynxkdi)(void) = (void(*)(void)) ntohl(hdr->ih_ep);
lynxos_bootparms_t *parms = (lynxos_bootparms_t *)0x0020;
bd_t *kbd;
- DECLARE_GLOBAL_DATA_PTR;
u32 *psz = (u32 *)(ntohl(hdr->ih_load) + 0x0204);
memset( parms, 0, sizeof(*parms));
#include <post.h>
+#ifdef CONFIG_SILENT_CONSOLE
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY)
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */
#endif
u_int i;
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (gd->flags & GD_FLG_SILENT) {
- /* Restore serial console */
- console_assign (stdout, "serial");
- console_assign (stderr, "serial");
- }
+ if (gd->flags & GD_FLG_SILENT) {
+ /* Restore serial console */
+ console_assign (stdout, "serial");
+ console_assign (stderr, "serial");
}
#endif
# endif
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (abort) {
- /* permanently enable normal console output */
- gd->flags &= ~(GD_FLG_SILENT);
- } else if (gd->flags & GD_FLG_SILENT) {
- /* Restore silent console */
- console_assign (stdout, "nulldev");
- console_assign (stderr, "nulldev");
- }
+ if (abort) {
+ /* permanently enable normal console output */
+ gd->flags &= ~(GD_FLG_SILENT);
+ } else if (gd->flags & GD_FLG_SILENT) {
+ /* Restore silent console */
+ console_assign (stdout, "nulldev");
+ console_assign (stderr, "nulldev");
}
#endif
int abort = 0;
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (gd->flags & GD_FLG_SILENT) {
- /* Restore serial console */
- console_assign (stdout, "serial");
- console_assign (stderr, "serial");
- }
+ if (gd->flags & GD_FLG_SILENT) {
+ /* Restore serial console */
+ console_assign (stdout, "serial");
+ console_assign (stderr, "serial");
}
#endif
putc ('\n');
#ifdef CONFIG_SILENT_CONSOLE
- {
- DECLARE_GLOBAL_DATA_PTR;
-
- if (abort) {
- /* permanently enable normal console output */
- gd->flags &= ~(GD_FLG_SILENT);
- } else if (gd->flags & GD_FLG_SILENT) {
- /* Restore silent console */
- console_assign (stdout, "nulldev");
- console_assign (stderr, "nulldev");
- }
+ if (abort) {
+ /* permanently enable normal console output */
+ gd->flags &= ~(GD_FLG_SILENT);
+ } else if (gd->flags & GD_FLG_SILENT) {
+ /* Restore silent console */
+ console_assign (stdout, "nulldev");
+ console_assign (stderr, "nulldev");
}
#endif
#include <serial.h>
#include <devices.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_SERIAL_MULTI)
static struct serial_device *serial_devices = NULL;
static int serial_register (struct serial_device *dev)
{
- DECLARE_GLOBAL_DATA_PTR;
-
dev->init += gd->reloc_off;
dev->setbrg += gd->reloc_off;
dev->getc += gd->reloc_off;
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
int serial_getc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
int serial_tstc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
void serial_putc (const char c)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
void serial_puts (const char *s)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
/* #define DEBUG_I2C */
+#ifdef DEBUG_I2C
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/*-----------------------------------------------------------------------
* Definitions
#ifdef DEBUG_I2C
#define PRINTD(fmt,args...) do { \
- DECLARE_GLOBAL_DATA_PTR; \
if (gd->have_console) \
printf (fmt ,##args); \
} while (0)
#include "../board/MAI/AmigaOneG3SE/memio.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
cpu_t
get_cpu_type(void)
{
#if !defined(CONFIG_BAB7xx)
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint type = get_cpu_type();
uint pvr = get_pvr();
ulong clock = gd->cpu_clk;
#ifdef CONFIG_AMIGAONEG3SE
unsigned long get_tbclk(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return (gd->bus_clk / 4);
}
#else /* ! CONFIG_AMIGAONEG3SE */
#include "../board/MAI/AmigaOneG3SE/via686.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
static const int hid1_multipliers_x_10[] = {
25, /* 0000 - 2.5x */
75, /* 0001 - 7.5x */
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = 0;
/* calculate the clock frequency based upon the CPU type */
#include <command.h>
#include <asm/processor.h>
+#ifdef CONFIG_AMIGAONEG3SE
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
void
print_backtrace(unsigned long *sp)
{
-#ifdef CONFIG_AMIGAONEG3SE
- DECLARE_GLOBAL_DATA_PTR;
-#endif
int cnt = 0;
unsigned long i;
#include <asm/arch/omap2420.h>
#endif
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <clps7111.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int reg = 0;
switch (gd->baudrate) {
#include <asm/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define PORTA (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTA))
#if !defined(CONFIG_NETARM_NS7520)
#define PORTB (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_PORTB))
*/
void serial_setbrg (void)
{
- /* get the gd pointer */
- DECLARE_GLOBAL_DATA_PTR;
-
/* set 0 ... make sure pins are configured for serial */
#if !defined(CONFIG_NETARM_NS7520)
PORTA = PORTB =
#include <asm/io.h>
#include <asm/arch/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_DBGU) && !defined(CONFIG_USART0) && !defined(CONFIG_USART1)
#error must define one of CONFIG_DBGU or CONFIG_USART0 or CONFIG_USART1
#endif
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int baudrate;
if ((baudrate = gd->baudrate) <= 0)
#include <command.h>
#include <arm920t.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#error "Bad: you didn't configure serial ..."
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Define the UART hardware register access structure.
*/
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile struct ks8695uart *uartp = KS8695_UART_ADDR;
/* Set to global baud rate and 8 data bits, no parity, 1 stop bit*/
#include <s3c2410.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_SERIAL1
#define UART_NR S3C24X0_UART0
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
int i;
unsigned int reg = 0;
#include <command.h>
#include <arm925t.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <command.h>
#include <arm926ejs.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <command.h>
#include <arm946es.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <common.h>
#include <command.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <asm/uaccess.h>
#include "bf533_serial.h"
+DECLARE_GLOBAL_DATA_PTR;
+
unsigned long pll_div_fact;
void calc_baud(void)
void serial_setbrg(void)
{
int i;
- DECLARE_GLOBAL_DATA_PTR;
calc_baud();
#include <asm/pci.h>
#include <asm/ic/sc520.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* utility functions for boards based on the AMD sc520
*
void init_sc520(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Set the UARTxCTL register at it's slower,
* baud clock giving us a 1.8432 MHz reference
*/
unsigned long init_sc520_dram(void)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
u32 dram_present=0;
#include <malloc.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#define UART_RBR 0x00
#define UART_THR 0x00
#define UART_IER 0x01
int serial_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
-
int bdiv = serial_div(gd->baudrate);
-
outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */
outb(bdiv, UART0_BASE + UART_DLL); /* set baudrate divisor */
outb(bdiv >> 8, UART0_BASE + UART_DLM);/* set baudrate divisor */
void serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned short bdiv;
bdiv = serial_div(gd->baudrate);
#if (CONFIG_KGDB_SER_INDEX & 2)
void kgdb_serial_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
bdiv = serial_div (CONFIG_KGDB_BAUDRATE);
#include <command.h>
#include <asm/arch/ixp425.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <common.h>
#include <asm/arch/ixp425.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int quot = 0;
int uart = CFG_IXP425_CONSOLE;
#include <command.h>
#include <arm920t.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1 (void)
{
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <common.h>
#include <lh7a40x.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONSOLE_UART1)
# define UART_CONSOLE 1
#elif defined(CONFIG_CONSOLE_UART2)
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE);
int i;
unsigned int reg = 0;
#include <asm/m5249.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_M5249
#define DoubleClock(a) ((double)(CFG_CLK/2) / 32.0 / (double)(a))
#else
}
void serial_setbrg(void) {
- DECLARE_GLOBAL_DATA_PTR;
rs_serial_setbaudrate(0,gd->bd->bi_baudrate);
}
int serial_init(void) {
- DECLARE_GLOBAL_DATA_PTR;
rs_serial_init(0,gd->baudrate);
return 0;
}
#include <common.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* get_clocks() fills in gd->cpu_clock and gd->bus_clk
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->cpu_clk = CFG_CLK;
#ifdef CONFIG_M5249
gd->bus_clk = gd->cpu_clk / 2;
#include <command.h>
#include <mpc5xx.h>
+DECLARE_GLOBAL_DATA_PTR;
#if (defined(CONFIG_MPC555))
# define ID_STR "MPC555/556"
*/
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
uint immr = get_immr (0); /* Return full IMMR contents */
uint pvr = get_pvr (); /* Retrieve PVR register */
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (volatile immap_t *) CFG_IMMR;
ulong oscclk, factor;
#include <command.h>
#include <mpc5xx.h>
+DECLARE_GLOBAL_DATA_PTR;
/*
* Local function prototypes
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *)CFG_IMMR;
short scxbr;
#include <mpc5xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Get cpu and bus clock
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immr = (immap_t *) CFG_IMMR;
#ifndef CONFIG_5xx_GCLK_FREQ
#include <mpc5xxx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
char buf[32];
#ifndef CONFIG_MGT5100
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
#include <common.h>
#include <mpc5xxx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breath some life into the CPU...
*
*/
void cpu_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long addecr = (1 << 25); /* Boot_CS */
#if defined(CFG_RAMBOOT) && defined(CONFIG_MGT5100)
addecr |= (1 << 22); /* SDRAM enable */
#include "sdma.h"
#include "fec.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/* #define DEBUG 0x28 */
#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
/********************************************************************/
static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
{
- DECLARE_GLOBAL_DATA_PTR;
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA;
/********************************************************************/
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis)
{
- DECLARE_GLOBAL_DATA_PTR;
mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_HARD_I2C
#include <mpc5xxx.h>
static int mpc_get_fdr(int speed)
{
- DECLARE_GLOBAL_DATA_PTR;
static int fdr = -1;
if (fdr == -1) {
#ifdef CFG_CMD_IDE
#include <mpc5xxx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define CALC_TIMING(t) (t + period - 1) / period
#ifdef CONFIG_IDE_RESET
int ide_preinit (void)
{
- DECLARE_GLOBAL_DATA_PTR;
long period, t0, t1, t2_8, t2_16, t4, ta;
vu_long reg;
struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA;
#include <common.h>
#include <mpc5xxx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_PSC_CONSOLE)
#if CONFIG_PSC_CONSOLE == 1
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
unsigned long baseclk;
int div;
void
serial_setbrg(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
unsigned long baseclk, div;
#include <mpc5xxx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* Bus-to-Core Multipliers */
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong val, vco;
#if !defined(CFG_MPC5XXX_CLKIN)
int prt_mpc5xxx_clks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
printf(" Bus %ld MHz, IPB %ld MHz, PCI %ld MHz\n",
gd->bus_clk / 1000000, gd->ipb_clk / 1000000,
gd->pci_clk / 1000000);
#include <mpc8220.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
char buf[32];
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
#include <common.h>
#include <mpc8220.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breath some life into the CPU...
*
*/
void cpu_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile flexbus8220_t *flexbus = (volatile flexbus8220_t *) MMAP_FB;
volatile pcfg8220_t *portcfg = (volatile pcfg8220_t *) MMAP_PCFG;
volatile xlbarb8220_t *xlbarb = (volatile xlbarb8220_t *) MMAP_XLBARB;
#include "i2cCore.h"
#include "dramSetup.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define SPD_SIZE CFG_SDRAM_SPD_SIZE
#define DRAM_SPD (CFG_SDRAM_SPD_I2C_ADDR)<<1 /* on Board SPD eeprom */
#define TOTAL_BANK CFG_SDRAM_TOTAL_BANKS
int readSpdData (u8 * spdData)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile i2c8220_t *pi2cReg;
volatile pcfg8220_t *pcfg;
u8 slvAdr = DRAM_SPD;
u32 dramSetup (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
draminfo_t DramInfo[TOTAL_BANK];
draminfo_t *pDramInfo;
u32 size, temp, cfg_value, mode_value, refresh;
#include <common.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_HARD_I2C
#include <mpc8220.h>
static int mpc_get_fdr (int speed)
{
- DECLARE_GLOBAL_DATA_PTR;
static int fdr = -1;
if (fdr == -1) {
#include <mpc8220.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
typedef struct pllmultiplier {
u8 hid1;
int multi;
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
pllcfg_t bus2core[] = {
{0x02, 2, 8}, /* 1 */
{0x01, 2, 4},
int prt_mpc8220_clks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
printf (" Bus %ld MHz, CPU %ld MHz, PCI %ld MHz, VCO %ld MHz\n",
gd->bus_clk / 1000000, gd->cpu_clk / 1000000,
gd->pci_clk / 1000000, gd->vco_clk / 1000000);
#include <common.h>
#include <mpc8220.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define PSC_BASE MMAP_PSC1
#if defined(CONFIG_PSC_CONSOLE)
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
u32 counter;
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
u32 counter;
#include <common.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int pvr = get_pvr ();
unsigned int version = pvr >> 16;
unsigned char revision;
#include <mpc824x.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* NOTE: This describes the proper use of this file.
*
/* compute the CPU and memory bus clock frequencies */
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint hid1 = mfspr(HID1);
hid1 = (hid1 >> (32-5)) & 0x1f;
gd->cpu_clk = (pllratio_to_factor[hid1] * get_bus_freq(0) + 5)
#include <common.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void
m8260_cpm_reset(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile ulong count;
uint
m8260_cpm_dpalloc(uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
uint retloc;
uint align_mask, off;
void
m8260_cpm_setbrg(uint brg, uint rate)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
uint cd = BRG_UART_CLK / rate;
void
m8260_cpm_fastbrg(uint brg, uint rate, int div16)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
/*
- * (C) Copyright 2000-2003
+ * (C) Copyright 2000-2006
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
#include <asm/processor.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *) CFG_IMMR;
ulong clock = gd->cpu_clk;
uint pvr = get_pvr ();
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
#include <asm/cpm_8260.h>
#include <ioports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static void config_8260_ioports (volatile immap_t * immr)
{
int portnum;
*/
void cpu_init_f (volatile immap_t * immr)
{
- DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */
uint sccr;
#endif
*/
int cpu_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) gd->bd->bi_immr_base;
immr->im_cpm.cp_rccr = CFG_RCCR;
*/
int prt_8260_rsr (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
static struct {
ulong mask;
char *desc;
#include <miiphy.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET) && \
defined(CONFIG_NET_MULTI)
void
eth_loopback_test (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile cpm8260_t *cp = &(immr->im_cpm);
int c, nclosed;
/* define to enable debug messages */
#undef DEBUG_I2C
+DECLARE_GLOBAL_DATA_PTR;
+
/* uSec to wait between polls of the i2c */
#define DELAY_US 100
/* uSec to wait for the CPM to start processing the buffer */
void i2c_init(int speed, int slaveadd)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *)CFG_IMMR ;
volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm;
volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
#include <mpc8260_irq.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/****************************************************************************/
struct irq_action {
int interrupt_init_cpu (unsigned *decrementer_count)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
*decrementer_count = (gd->bus_clk / 4) / CFG_HZ;
#include <mpc8260.h>
#include <asm/m8260_pci.h>
#include <asm/io.h>
+
+#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
/*
* Local->PCI map (from CPU) controlled by
* MPC826x master window
void pci_mpc8250_init (struct pci_controller *hose)
{
-#if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272
- DECLARE_GLOBAL_DATA_PTR;
-#endif
u16 tempShort;
volatile immap_t *immap = (immap_t *) CFG_IMMR;
#include <mpc8260.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONS_ON_SCC)
#if CONFIG_CONS_INDEX == 1 /* Console on SCC1 */
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_CONS_USE_EXTC)
m8260_cpm_extcbrg(SCC_INDEX, gd->baudrate,
CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL);
#include <mpc8260.h>
#include <asm/cpm_8260.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CONS_ON_SMC)
#if CONFIG_CONS_INDEX == 1 /* Console on SMC1 */
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_CONS_USE_EXTC)
m8260_cpm_extcbrg(brg_map[SMC_INDEX], gd->baudrate,
CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL);
#include <mpc8260.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ------------------------------------------------------------------------- */
/* Bus-to-Core Multiplier */
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *) CFG_IMMR;
ulong clkin;
ulong sccr, dfbrg;
int prt_8260_clks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *) CFG_IMMR;
ulong sccr, dfbrg;
ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf;
#include <ft_build.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkcpu(void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong clock = gd->cpu_clk;
u32 pvr = get_pvr();
char buf[32];
unsigned long get_tbclk(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong tbclk;
tbclk = (gd->bus_clk + 3L) / 4L;
#include <mpc83xx.h>
#include <ioports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breathe some life into the CPU...
*
*/
void cpu_init_f (volatile immap_t * im)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Pointer is writable since we allocated a register for it */
gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
#include <mpc83xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
struct irq_action {
interrupt_handler_t *handler;
void *arg;
int interrupt_init_cpu (unsigned *decrementer_count)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMRBAR;
*decrementer_count = (gd->bus_clk / 4) / CFG_HZ;
#include <mpc83xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* ----------------------------------------------------------------- */
typedef enum {
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
u32 pci_sync_in;
u8 spmf;
*********************************************/
ulong get_bus_freq (ulong dummy)
{
- DECLARE_GLOBAL_DATA_PTR;
return gd->csb_clk;
}
int print_clock_conf (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
printf("Clock configuration:\n");
printf(" Coherent System Bus: %4d MHz\n",gd->csb_clk/1000000);
printf(" Core: %4d MHz\n",gd->core_clk/1000000);
#include <asm/processor.h>
#include <asm/mpc8349_pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* Returns 0 if exception not found and fixup otherwise. */
extern unsigned long search_exception_table(unsigned long);
void
print_backtrace(unsigned long *sp)
{
- DECLARE_GLOBAL_DATA_PTR;
int cnt = 0;
unsigned long i;
#include <common.h>
#include <asm/cpm_85xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CPM2)
/*
* because we have stack and init data in dual port ram
void
m8560_cpm_reset(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile ulong count;
uint
m8560_cpm_dpalloc(uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
uint retloc;
uint align_mask, off;
void
m8560_cpm_setbrg(uint brg, uint rate)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
void
m8560_cpm_fastbrg(uint brg, uint rate, int div16)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
#include <ioports.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_CPM2
static void config_8560_ioports (volatile immap_t * immr)
{
void cpu_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_lbc_t *memctl = &immap->im_lbc;
extern void m8560_cpm_reset (void);
#include <common.h>
#include <asm/cpm_85xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CPM2)
#if defined(CONFIG_CONS_ON_SCC)
void
serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_CONS_USE_EXTC)
m8560_cpm_extcbrg(SCC_INDEX, gd->baudrate,
CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL);
#include <ppc_asm.tmpl>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* --------------------------------------------------------------- */
void get_sys_info (sys_info_t * sysInfo)
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
sys_info_t sys_info;
#if defined(CONFIG_CPM2)
volatile immap_t *immap = (immap_t *) CFG_IMMR;
#include <command.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
void
print_backtrace(unsigned long *sp)
{
- DECLARE_GLOBAL_DATA_PTR;
int cnt = 0;
unsigned long i;
#include <common.h>
#include <commproc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CFG_ALLOC_DPRAM
int dpram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Reclaim the DP memory for our use. */
gd->dp_alloc_base = CPM_DATAONLY_BASE;
gd->dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
*/
uint dpram_alloc (uint size)
{
- DECLARE_GLOBAL_DATA_PTR;
uint addr = gd->dp_alloc_base;
if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top)
uint dpram_base (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
return gd->dp_alloc_base;
}
*/
uint dpram_alloc_align (uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint addr, mask = align - 1;
addr = (gd->dp_alloc_base + mask) & ~mask;
uint dpram_base_align (uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint mask = align - 1;
return (gd->dp_alloc_base + mask) & ~mask;
#include <mpc8xx.h>
#include <asm/cache.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static char *cpu_warning = "\n " \
"*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***";
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong clock = gd->cpu_clk;
uint immr = get_immr (0); /* Return full IMMR contents */
uint pvr = get_pvr ();
*/
unsigned long get_tbclk (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint immr = get_immr (0); /* Return full IMMR contents */
volatile immap_t *immap = (volatile immap_t *)(immr & 0xFFFF0000);
ulong oscclk, factor, pll;
#include <mpc8xx.h>
#include <commproc.h>
+#if defined(CFG_RTCSC) || defined(CFG_RMDS)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if defined(CFG_I2C_UCODE_PATCH) || defined(CFG_SPI_UCODE_PATCH)
void cpm_load_patch (volatile immap_t * immr);
#endif
int cpu_init_r (void)
{
#if defined(CFG_RTCSC) || defined(CFG_RMDS)
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
volatile immap_t *immr = (volatile immap_t *) (bd->bi_immr_base);
#endif
#include <net.h>
#include <command.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#undef ET_DEBUG
#if (CONFIG_COMMANDS & CFG_CMD_NET) && \
static void fec_pin_init(int fecidx)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
volatile immap_t *immr = (immap_t *) CFG_IMMR;
volatile fec_t *fecp;
#include <watchdog.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/* define to enable debug messages */
#undef DEBUG_I2C
void
i2c_init(int speed, int slaveaddr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immap = (immap_t *)CFG_IMMR ;
volatile cpm8xx_t *cp = (cpm8xx_t *)&immap->im_cpm;
volatile i2c8xx_t *i2c = (i2c8xx_t *)&immap->im_i2c;
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- DECLARE_GLOBAL_DATA_PTR;
-
i2c_state_t state;
uchar xaddr[4];
int rc;
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- DECLARE_GLOBAL_DATA_PTR;
-
i2c_state_t state;
uchar xaddr[4];
int rc;
#include <serial.h>
#include <watchdog.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */
#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
static void serial_setdivisor(volatile cpm8xx_t *cp)
{
- DECLARE_GLOBAL_DATA_PTR;
int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate;
if(divisor/16>0x1000) {
volatile cpm8xx_t *cpmp = &(im->im_cpm);
#ifdef CONFIG_MODEM_SUPPORT
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->be_quiet)
return;
#endif
volatile cpm8xx_t *cpmp = &(im->im_cpm);
#ifdef CONFIG_MODEM_SUPPORT
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->be_quiet)
return;
#endif
#ifdef CONFIG_MODEM_SUPPORT
void disable_putc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->be_quiet = 1;
}
void enable_putc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->be_quiet = 0;
}
#endif
#include <mpc8xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT) || defined(CFG_MEASURE_CPUCLK) || defined(DEBUG)
#define PITC_SHIFT 16
*/
int get_clocks (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint immr = get_immr (0); /* Return full IMMR contents */
volatile immap_t *immap = (immap_t *) (immr & 0xFFFF0000);
uint sccr = immap->im_clkrst.car_sccr;
*/
int get_clocks_866 (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
char tmp[64];
long cpuclk = 0;
*/
int sdram_adjust_866 (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
long mamr;
*/
int adjust_sdram_tbs_8xx (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
long mamr;
long sccr;
#ifdef CONFIG_VIDEO
+DECLARE_GLOBAL_DATA_PTR;
+
/************************************************************************/
/* ** DEBUG SETTINGS */
/************************************************************************/
u16 *screen = video_fb_address, width = VIDEO_COLS;
#ifdef VIDEO_INFO
# ifndef CONFIG_FADS
- DECLARE_GLOBAL_DATA_PTR;
char temp[32];
# endif
char info[80];
int drv_video_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int error, devices = 1;
device_t videodev;
#include <watchdog.h>
#include <nios-io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*------------------------------------------------------------------
* JTAG acts as the serial port
*-----------------------------------------------------------------*/
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned div;
div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
#include <nios2.h>
#include <nios2-io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*------------------------------------------------------------------
* JTAG acts as the serial port
*-----------------------------------------------------------------*/
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
unsigned div;
div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
#include <asm/processor.h>
#include <pci.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
#ifdef CONFIG_PCI
*-----------------------------------------------------------------------------*/
void pci_405gp_init(struct pci_controller *hose)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int i, reg_num = 0;
bd_t *bd = gd->bd;
#include <asm/cache.h>
#include <ppc4xx.h>
+#if !defined(CONFIG_405)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#if defined(CONFIG_440)
#define FREQ_EBC (sys_info.freqEPB)
int checkcpu (void)
{
#if !defined(CONFIG_405) /* not used on Xilinx 405 FPGA implementations */
- DECLARE_GLOBAL_DATA_PTR;
uint pvr = get_pvr();
ulong clock = gd->cpu_clk;
char buf[32];
#include <asm/processor.h>
#include <ppc4xx.h>
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
int cpu_init_r (void)
{
#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
unsigned long reg;
#if defined(CONFIG_405GP)
#ifdef CONFIG_HARD_I2C
+DECLARE_GLOBAL_DATA_PTR;
+
#define IIC_OK 0
#define IIC_NOK 1
#define IIC_NOK_LA 2 /* Lost arbitration */
{
uchar xaddr[4];
int ret;
- DECLARE_GLOBAL_DATA_PTR;
if ( alen > 4 ) {
printf ("I2C read: addr len %d not supported\n", alen);
#include <commproc.h>
#include "vecnum.h"
+DECLARE_GLOBAL_DATA_PTR;
+
/****************************************************************************/
/*
int interrupt_init_cpu (unsigned *decrementer_count)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int vec;
unsigned long val;
#include <malloc.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*****************************************************************************/
#ifdef CONFIG_IOP480
int serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
unsigned short br_reg;
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned short br_reg;
br_reg = ((((CONFIG_CPUCLOCK * 1000000) / 16) / gd->baudrate) - 1);
int serial_init(void)
#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long reg;
unsigned long udiv;
unsigned short bdiv;
int serial_init (void)
#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long reg;
unsigned long tmp;
unsigned long clk;
void serial_setbrg (void)
#endif
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long tmp;
unsigned long clk;
unsigned long udiv;
#if (CONFIG_KGDB_SER_INDEX & 2)
void kgdb_serial_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile char val;
unsigned short br_reg;
#include <ppc4xx.h>
#include <asm/processor.h>
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#define ONE_BILLION 1000000000
int get_clocks (void)
{
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || defined(CONFIG_405) || defined(CONFIG_405EP)
- DECLARE_GLOBAL_DATA_PTR;
-
sys_info_t sys_info;
get_sys_info (&sys_info);
#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
#ifdef CONFIG_IOP480
- DECLARE_GLOBAL_DATA_PTR;
-
gd->cpu_clk = 66000000;
gd->bus_clk = 66000000;
#endif
#include <command.h>
#include <asm/arch/pxa-regs.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <watchdog.h>
#include <asm/arch/pxa-regs.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int quot = 0;
if (gd->baudrate == 1200)
#include <common.h>
#include <asm/hardware.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* flush serial input queue. returns 0 on success or negative error
* number otherwise
*/
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
u32 divisor = 0;
/* get correct divisor */
#include <common.h>
#include <command.h>
+#ifdef CONFIG_USE_IRQ
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
int cpu_init (void)
{
/*
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- DECLARE_GLOBAL_DATA_PTR;
-
IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
#include <common.h>
#include <SA-1100.h>
+DECLARE_GLOBAL_DATA_PTR;
+
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int reg = 0;
if (gd->baudrate == 1200)
#include <devices.h>
#include <net.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static char input_buffer[512];
static int input_size = 0; /* char count in input buffer */
static int input_offset = 0; /* offset to valid chars in input buffer */
static void nc_send_packet (const char *buf, int len)
{
- DECLARE_GLOBAL_DATA_PTR;
-
struct eth_device *eth;
int inited = 0;
uchar *pkt;
#include "ns9750_bbus.h" /* for GPIOs */
#include "ns9750_ser.h" /* for serial configuration */
+DECLARE_GLOBAL_DATA_PTR;
+
#define CONSOLE CONFIG_CONS_INDEX
static unsigned int calcBitrateRegister( void );
static unsigned int calcBitrateRegister( void )
{
- DECLARE_GLOBAL_DATA_PTR;
-
return ( NS9750_SER_BITRATE_EBIT |
NS9750_SER_BITRATE_CLKMUX_BCLK |
NS9750_SER_BITRATE_TMODE |
static unsigned int calcRxCharGapRegister( void )
{
- DECLARE_GLOBAL_DATA_PTR;
-
return NS9750_SER_RX_CHAR_TIMER_TRUN;
}
#include <asm/atomic.h>
#include <ps2mult.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* #define DEBUG */
#define PS2SER_BAUD 57600
#ifdef CONFIG_MPC5xxx
int ps2ser_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
unsigned long baseclk;
int div;
#include <asm/hardware.h>
#include "s3c4510b_uart.h"
+DECLARE_GLOBAL_DATA_PTR;
+
static UART *uart;
/* flush serial input queue. returns 0 on success or negative error
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
UART_LINE_CTRL ulctrl;
UART_CTRL uctrl;
UART_BAUD_DIV ubd;
#include <ns87308.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_CONS_INDEX)
#error "No console index specified."
#elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 4)
static int calc_divisor (NS16550_t port)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
#ifdef CONFIG_MAX3100_SERIAL
+DECLARE_GLOBAL_DATA_PTR;
+
/**************************************************************/
/* convienient macros */
{
unsigned int wconf, rconf;
int i;
- DECLARE_GLOBAL_DATA_PTR;
wconf = 0;
#include "tsec.h"
#include "miiphy.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define TX_BUF_CNT 2
static uint rxIdx; /* index of the current RX buffer */
struct phy_cmd **cmdlistptr;
struct phy_cmd *cmd;
int i,j,k;
- DECLARE_GLOBAL_DATA_PTR;
for(i=0; phy_info[i]; i++) {
/* First thing's first: relocate the pointers to the
#include <common.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define STANDALONE
#ifndef STANDALONE /* Linked into/Part of PPCBoot */
uint dpalloc (uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
volatile immap_t *immr = (immap_t *) CFG_IMMR;
uint retloc;
uint align_mask, off;
#include <mpc8xx_irq.h>
#include <exports.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#undef DEBUG
#define TIMER_PERIOD 1000000 /* 1 second clock */
int timer (int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
cpmtimer8xx_t *cpmtimerp; /* Pointer to the CPM Timer structure */
tid_8xx_cpmtimer_t hw;
tid_8xx_cpmtimer_t *hwp = &hw;
#include <dataflash.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong *len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong len = 0, checksum;
ulong initrd_start, initrd_end;
ulong data;
#include "blackfin_board.h"
#include "../drivers/smc91111.h"
+DECLARE_GLOBAL_DATA_PTR;
+
extern flash_info_t flash_info[];
static int init_baudrate(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uchar tmp[64];
int i = getenv_r("baudrate", tmp, sizeof(tmp));
gd->bd->bi_baudrate = gd->baudrate = (i > 0)
#ifdef DEBUG
static void display_global_data(void)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd;
bd = gd->bd;
printf("--flags:%x\n", gd->flags);
void board_init_f(ulong bootflag)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong addr;
bd_t *bd;
void board_init_r(gd_t * id, ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong size;
extern void malloc_bin_reloc(void);
char *s, *e;
#include <asm/realmode.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define NUMVECTS 256
#define BIOS_DATA ((char*)0x400)
int bios_setup(void)
{
- DECLARE_GLOBAL_DATA_PTR;
static int done=0;
int vector;
struct pci_controller *pri_hose;
#include <ide.h>
#include <asm/u-boot-i386.h>
+DECLARE_GLOBAL_DATA_PTR;
+
extern long _i386boot_start;
extern long _i386boot_end;
extern long _i386boot_romdata_start;
static int mem_malloc_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* start malloc area right after the stack */
mem_malloc_start = i386boot_bss_start +
i386boot_bss_size + CFG_STACK_SIZE;
*/
static int init_baudrate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char tmp[64]; /* long enough for environment variables */
int i = getenv_r("baudrate", tmp, 64);
*/
static int display_dram_config (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int i;
puts ("DRAM Configuration:\n");
void start_i386boot (void)
{
- DECLARE_GLOBAL_DATA_PTR;
char *s;
int i;
ulong size;
#include <i2c.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
static char *failed = "*** failed ***\n";
#ifdef CONFIG_PCU_E
*/
static void mem_malloc_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
mem_malloc_end = dest_addr;
static int init_baudrate (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uchar tmp[64]; /* long enough for environment variables */
int i = getenv_r ("baudrate", tmp, sizeof (tmp));
static int init_func_ram (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int board_type = 0; /* use dummy arg */
puts ("DRAM: ");
void
board_init_f (ulong bootflag)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
ulong len, addr, addr_sp;
gd_t *id;
*/
void board_init_r (gd_t *id, ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
cmd_tbl_t *cmdtp;
char *s, *e;
bd_t *bd;
#include <zlib.h>
#include <asm/byteorder.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define PHYSADDR(x) x
#define LINUX_MAX_ENVS 256
void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong * len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong len = 0, checksum;
ulong initrd_start, initrd_end;
ulong data;
#include <version.h>
#include <watchdog.h>
+DECLARE_GLOBAL_DATA_PTR;
+
const char version_string[] =
U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
void board_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
#include <asm/byteorder.h>
#include <asm/addrspace.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong * len_ptr, int verify)
{
- DECLARE_GLOBAL_DATA_PTR;
-
ulong len = 0, checksum;
ulong initrd_start, initrd_end;
ulong data;
#include <status_led.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
/*
* All attempts to come up with a "common" initialization sequence
/***********************************************************************/
void board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
char *s, *e;
#include <status_led.h>
#endif
+DECLARE_GLOBAL_DATA_PTR;
/*
* All attempts to come up with a "common" initialization sequence
/***********************************************************************/
void board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd;
init_fnc_t **init_fnc_ptr;
char *s, *e;
#endif
#include <environment.h>
+
DECLARE_GLOBAL_DATA_PTR;
#if defined(CFG_ENV_IS_EMBEDDED)
#if (CONFIG_COMMANDS & CFG_CMD_NET)
+DECLARE_GLOBAL_DATA_PTR;
+
#define ARP_TIMEOUT 5 /* Seconds before trying ARP again */
#ifndef CONFIG_NET_RETRY_COUNT
# define ARP_TIMEOUT_COUNT 5 /* # of timeouts before giving up */
int
NetLoop(proto_t protocol)
{
- DECLARE_GLOBAL_DATA_PTR;
-
bd_t *bd = gd->bd;
#ifdef CONFIG_NET_MULTI
void NetStartAgain (void)
{
-#ifdef CONFIG_NET_MULTI
- DECLARE_GLOBAL_DATA_PTR;
-#endif
char *nretry;
int noretry = 0, once = 0;
#include <net.h>
#include <serial.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define MIN_PACKET_LENGTH 64
#define MAX_PACKET_LENGTH 256
#define TEST_NUM 1
static void scc_init (int scc_index)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
static int proff[] =
#if CONFIG_POST & CFG_POST_MEMORY
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Define INJECT_*_ERRORS for testing error detection in the presence of
* _good_ hardware.
int memory_post_test (int flags)
{
int ret = 0;
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
256 << 20 : bd->bi_memsize) - (1 << 20);
#ifdef CONFIG_POST
+DECLARE_GLOBAL_DATA_PTR;
+
#define POST_MAX_NUMBER 32
#define BOOTMODE_MAGIC 0xDEAD0000
int post_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int res = 0;
unsigned int i;
void post_bootmode_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
int bootmode = post_bootmode_get (0);
int newword;
/* POST tests run before relocation only mark status bits .... */
static void post_log_mark_start ( unsigned long testid )
{
- DECLARE_GLOBAL_DATA_PTR;
gd->post_log_word |= (testid)<<16;
}
static void post_log_mark_succ ( unsigned long testid )
{
- DECLARE_GLOBAL_DATA_PTR;
gd->post_log_word |= testid;
}
/* ... and the messages are output once we are relocated */
void post_output_backlog ( void )
{
- DECLARE_GLOBAL_DATA_PTR;
int j;
for (j = 0; j < post_list_size; j++) {
void post_reloc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int i;
/*
#if CONFIG_POST & CFG_POST_SYSMON
+DECLARE_GLOBAL_DATA_PTR;
+
static int sysmon_temp_invalid = 0;
/* #define DEBUG */
void sysmon_reloc (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
sysmon_t ** l;
sysmon_table_t * t;
int sysmon_post_test (int flags)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int res = 0;
sysmon_table_t * t;
uint val;
#include <command.h>
#include <serial.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define CTLR_SMC 0
#define CTLR_SCC 1
static void smc_init (int smc_index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
static int cpm_cr_ch[] = { CPM_CR_CH_SMC1, CPM_CR_CH_SMC2 };
volatile immap_t *im = (immap_t *) CFG_IMMR;
static void scc_init (int scc_index)
{
- DECLARE_GLOBAL_DATA_PTR;
-
static int cpm_cr_ch[] = {
CPM_CR_CH_SCC1,
CPM_CR_CH_SCC2,
projects / u-boot / commitdiff