]> git.sur5r.net Git - u-boot/commitdiff
Update the SPC1920 CMB PLD driver
authorMarkus Klotzbuecher <mk@creamnet.de>
Tue, 9 Jan 2007 13:57:10 +0000 (14:57 +0100)
committerMarkus Klotzbuecher <mk@pollux.denx.de>
Tue, 9 Jan 2007 13:57:10 +0000 (14:57 +0100)
board/spc1920/pld.h
include/configs/spc1920.h

index 3254f820c1e1d597b755059879d7cdb5c15ef46b..5beb71b5ccaab06d76226c2f2f7e0602e642c819 100644 (file)
@@ -5,8 +5,8 @@ typedef struct spc1920_pld {
        uchar com1_en;
        uchar dsp_reset;
        uchar dsp_hpi_on;
+       uchar superv_mode;
        uchar codec_dsp_power_en;
-       uchar clk2_en;
        uchar clk3_select;
        uchar clk4_select;
 } spc1920_pld_t;
index 6db0d1a1c83186e975258f1a07955fff64800dd8..f8909b1d1d487eda48a411223365f3028fce42ad 100644 (file)
@@ -89,7 +89,7 @@
                         | CFG_CMD_PING \
                         | CFG_CMD_DHCP \
                         | CFG_CMD_IMMAP \
-                         | CFG_CMD_I2C \
+                        | CFG_CMD_I2C \
                         | CFG_CMD_MII)
                        /* & ~( CFG_CMD_NET)) */
 
 #define I2C_TRISTATE   (immr->im_cpm.cp_pbdir &= ~PB_SDA)
 #define I2C_READ       ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
 #define I2C_SDA(bit)   if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
-                       else    immr->im_cpm.cp_pbdat &= ~PB_SDA
+                      else    immr->im_cpm.cp_pbdat &= ~PB_SDA
 #define I2C_SCL(bit)   if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
-                       else    immr->im_cpm.cp_pbdat &= ~PB_SCL
+                      else    immr->im_cpm.cp_pbdat &= ~PB_SCL
 #define I2C_DELAY      udelay(2)       /* 1/4 I2C clock duration */
 #endif /* CONFIG_SOFT_I2C */
 #endif
 #define HPI_HPID_NOINC_2       HPI_REG(0x3000000 + 2)
 #endif /* CONFIG_SPC1920_HPI_TEST */
 
-/* PLD CS5 */
+/*
+ * PLD CS5 
+ */
 #define CFG_SPC1920_PLD_BASE   0x80000000
-#define CFG_PRELIM_OR5_AM      0xffff8000
+#define CFG_PRELIM_OR5_AM      0xfff00000
 
 #define CFG_OR5_PRELIM         (CFG_PRELIM_OR5_AM | \
                                        OR_CSNT_SAM | \
 
 #define CFG_BR5_PRELIM ((CFG_SPC1920_PLD_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
 
-/* #define CFG_PLD_BASE   0x30000000 */
-/* #define CFG_OR5_PRELIM 0xffff1110 */
-/* #define CFG_BR5_PRELIM 0x30000401 */
-
 /*
  * Internal Definitions
  *