The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
 #include <common.h>
 
 #ifdef CONFIG_ATSTK1000_EXT_FLASH
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 #include <asm/io.h>
 #include <asm/sections.h>
 
 
 #include <common.h>
 
 #ifdef CONFIG_FAVR32_EZKIT_EXT_FLASH
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 #include <asm/io.h>
 #include <asm/sections.h>
 
 
 
 #include <common.h>
 
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 
 void dcache_clean_range(volatile void *start, size_t size)
 {
 
 #define __ASM_AVR32_DMA_MAPPING_H
 
 #include <asm/io.h>
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 
 enum dma_data_direction {
        DMA_BIDIRECTIONAL       = 0,
 
 }
 
 #ifdef CONFIG_SYS_DMA_ALLOC_LEN
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 #include <asm/io.h>
 
 static unsigned long dma_alloc_start;