--- /dev/null
+/*
+ * (C) Copyright 2011
+ * Alexander Holler <holler@ahsoftware.de>
+ *
+ * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37
+ *
+ * See there for additional Copyrights.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+#ifndef _EHCI_OMAP3_H_
+#define _EHCI_OMAP3_H_
+
+/* USB/EHCI registers */
+#define OMAP3_USBTLL_BASE 0x48062000UL
+#define OMAP3_UHH_BASE 0x48064000UL
+#define OMAP3_EHCI_BASE 0x48064800UL
+
+/* TLL Register Set */
+#define OMAP_USBTLL_SYSCONFIG (0x10)
+#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
+#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
+#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
+#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
+
+#define OMAP_USBTLL_SYSSTATUS (0x14)
+#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
+
+/* UHH Register Set */
+#define OMAP_UHH_SYSCONFIG (0x10)
+#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1)
+#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8)
+#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3)
+#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2)
+#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12)
+
+#define OMAP_UHH_HOSTCONFIG (0x40)
+#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
+#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
+#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
+
+#endif /* _EHCI_OMAP3_H_ */
#include <asm/arch/sys_proto.h>
#include <asm/arch/gpio.h>
#include <asm/mach-types.h>
+#ifdef CONFIG_USB_EHCI
+#include <usb.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/clocks_omap3.h>
+#include <asm/arch/ehci_omap3.h>
+/* from drivers/usb/host/ehci-core.h */
+extern struct ehci_hccr *hccr;
+extern volatile struct ehci_hcor *hcor;
+#endif
#include "beagle.h"
+#define pr_debug(fmt, args...) debug(fmt, ##args)
+
#define TWL4030_I2C_BUS 0
#define EXPANSION_EEPROM_I2C_BUS 1
#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
return 0;
}
#endif
+
+#ifdef CONFIG_USB_EHCI
+
+#define GPIO_PHY_RESET 147
+
+/* Reset is needed otherwise the kernel-driver will throw an error. */
+int ehci_hcd_stop(void)
+{
+ pr_debug("Resetting OMAP3 EHCI\n");
+ omap_set_gpio_dataout(GPIO_PHY_RESET, 0);
+ writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
+ return 0;
+}
+
+/* Call usb_stop() before starting the kernel */
+void show_boot_progress(int val)
+{
+ if(val == 15)
+ usb_stop();
+}
+
+/*
+ * Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
+ * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
+ * See there for additional Copyrights.
+ */
+int ehci_hcd_init(void)
+{
+ pr_debug("Initializing OMAP3 ECHI\n");
+
+ /* Put the PHY in RESET */
+ omap_request_gpio(GPIO_PHY_RESET);
+ omap_set_gpio_direction(GPIO_PHY_RESET, 0);
+ omap_set_gpio_dataout(GPIO_PHY_RESET, 0);
+
+ /* Hold the PHY in RESET for enough time till DIR is high */
+ /* Refer: ISSUE1 */
+ udelay(10);
+
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
+ sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
+ /*
+ * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
+ * and USBHOST_120M_FCLK (USBHOST_FCLK2)
+ */
+ sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
+ /* Enable USBTTL_ICLK */
+ sr32(&prcm_base->iclken3_core, 2, 1, 1);
+ /* Enable USBTTL_FCLK */
+ sr32(&prcm_base->fclken3_core, 2, 1, 1);
+ pr_debug("USB clocks enabled\n");
+
+ /* perform TLL soft reset, and wait until reset is complete */
+ writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
+ OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
+ /* Wait for TLL reset to complete */
+ while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
+ & OMAP_USBTLL_SYSSTATUS_RESETDONE));
+ pr_debug("TLL reset done\n");
+
+ writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
+ OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
+ OMAP_USBTLL_SYSCONFIG_CACTIVITY,
+ OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
+
+ /* Put UHH in NoIdle/NoStandby mode */
+ writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
+ | OMAP_UHH_SYSCONFIG_SIDLEMODE
+ | OMAP_UHH_SYSCONFIG_CACTIVITY
+ | OMAP_UHH_SYSCONFIG_MIDLEMODE,
+ OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
+
+ /* setup burst configurations */
+ writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
+ | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
+ | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
+ OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
+
+ /*
+ * Refer ISSUE1:
+ * Hold the PHY in RESET for enough time till
+ * PHY is settled and ready
+ */
+ udelay(10);
+ omap_set_gpio_dataout(GPIO_PHY_RESET, 1);
+
+ hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
+ hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
+
+ pr_debug("OMAP3 EHCI init done\n");
+ return 0;
+}
+
+#endif /* CONFIG_USB_EHCI */
projects / u-boot / commitdiff