]> git.sur5r.net Git - u-boot/commitdiff
arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
authorPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Thu, 2 Feb 2017 09:31:13 +0000 (15:01 +0530)
committerYork Sun <york.sun@nxp.com>
Fri, 3 Feb 2017 22:31:02 +0000 (14:31 -0800)
Enable IFC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
14 files changed:
arch/powerpc/cpu/mpc85xx/Kconfig
include/configs/B4860QDS.h
include/configs/BSC9131RDB.h
include/configs/BSC9132QDS.h
include/configs/C29XPCIE.h
include/configs/P1010RDB.h
include/configs/T102xQDS.h
include/configs/T102xRDB.h
include/configs/T1040QDS.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/t4qds.h

index 38ea4c1440b398e391c8aef55f1e80529dff0737..a3db01407ce7f3fd9813baed7ec62ba755bef402 100644 (file)
@@ -374,6 +374,7 @@ config ARCH_B4420
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC64
+       select FSL_IFC
 
 config ARCH_B4860
        bool
@@ -398,6 +399,7 @@ config ARCH_B4860
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC64
+       select FSL_IFC
 
 config ARCH_BSC9131
        bool
@@ -410,6 +412,7 @@ config ARCH_BSC9131
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
+       select FSL_IFC
 
 config ARCH_BSC9132
        bool
@@ -426,6 +429,7 @@ config ARCH_BSC9132
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC_E500_USE_DEBUG_TLB
+       select FSL_IFC
 
 config ARCH_C29X
        bool
@@ -438,6 +442,7 @@ config ARCH_C29X
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_6
        select SYS_PPC_E500_USE_DEBUG_TLB
+       select FSL_IFC
 
 config ARCH_MPC8536
        bool
@@ -553,6 +558,7 @@ config ARCH_P1010
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC_E500_USE_DEBUG_TLB
+       select FSL_IFC
 
 config ARCH_P1011
        bool
@@ -795,6 +801,7 @@ config ARCH_T1023
        select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
+       select FSL_IFC
 
 config ARCH_T1024
        bool
@@ -811,6 +818,7 @@ config ARCH_T1024
        select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
+       select FSL_IFC
 
 config ARCH_T1040
        bool
@@ -828,6 +836,7 @@ config ARCH_T1040
        select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
+       select FSL_IFC
 
 config ARCH_T1042
        bool
@@ -845,6 +854,7 @@ config ARCH_T1042
        select SYS_FSL_QORIQ_CHASSIS2
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_5
+       select FSL_IFC
 
 config ARCH_T2080
        bool
@@ -866,6 +876,7 @@ config ARCH_T2080
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC64
+       select FSL_IFC
 
 config ARCH_T2081
        bool
@@ -885,6 +896,7 @@ config ARCH_T2081
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC64
+       select FSL_IFC
 
 config ARCH_T4160
        bool
@@ -905,6 +917,7 @@ config ARCH_T4160
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC64
+       select FSL_IFC
 
 config ARCH_T4240
        bool
@@ -928,6 +941,7 @@ config ARCH_T4240
        select SYS_FSL_SEC_BE
        select SYS_FSL_SEC_COMPAT_4
        select SYS_PPC64
+       select FSL_IFC
 
 config BOOKE
        bool
@@ -1260,6 +1274,9 @@ config SYS_PPC64
 config SYS_PPC_E500_USE_DEBUG_TLB
        bool
 
+config FSL_IFC
+       bool
+
 config SYS_PPC_E500_DEBUG_TLB
        int "Temporary TLB entry for external debugger"
        depends on SYS_PPC_E500_USE_DEBUG_TLB
index 3ad9f80ce15b1d66eae9128ce439c17f62a95c0d..4267d81d952293f8ef99a747d01c1ceb82e7acf5 100644 (file)
@@ -63,7 +63,6 @@
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCIE1                   /* PCIE controller 1 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
index 31976f3bd298438beed17d1531cf0e5f9be015a1..db7574d5b54d76da1deffdacd0fcf39162d64254 100644 (file)
@@ -46,7 +46,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 
 #define CONFIG_TSEC_ENET
index dbd3724a83515342aad244317e716a7fb281a381..4c55da401cde461abf1dab180da865db5c2ded45 100644 (file)
@@ -68,7 +68,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES          /* common SERDES init code */
 
index 53ee98c3117c3c32f1cf76cfe8a0986550b201e5..269cd49648730620dd8bda7b6a844afa57ac921d 100644 (file)
@@ -68,7 +68,6 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES          /* common SERDES init code */
 
index 979a8f1f65733960aa88638e3f41f003194e2ae2..83bb2ccf1a252aa282fbce884432c4ba78575122 100644 (file)
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_SYS_HAS_SERDES          /* common SERDES init code */
 
index 530253fcc6caf509c8b8c4376c7a4738f3cb577b..669a09487c22735a95f2414785a8de46aa7f8a30 100644 (file)
@@ -23,7 +23,6 @@
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 
 #define CONFIG_ENV_OVERWRITE
 
index 88094e0e13f1e753e4a4e4b95fd2bc7496e36004..57e0cfa07b0091fb4665224bf06d9d21b37869ae 100644 (file)
@@ -23,7 +23,6 @@
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 
 #define CONFIG_ENV_OVERWRITE
 
index 58bafd25a732177c6295b288dc73d7fbb90ff9be..385e7abc29f628db9ce423d8edd40a5fcead08b1 100644 (file)
@@ -51,7 +51,6 @@
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCIE1                   /* PCIE controller 1 */
index 703e1e3049c394c7aa22fff0f024547a4f6742e3..bcb8edaa0d220c0c3ce529b866e6f3968a63a7f5 100644 (file)
@@ -162,7 +162,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCIE1                   /* PCIE controller 1 */
index 210d8d8343c838031afede4b04cc9578e935bdda..9ec326abca6ad9ddce2d68dc2a179d1a10f0060f 100644 (file)
@@ -33,7 +33,6 @@
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC         /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                /* Enable SEC/CAAM */
 #define CONFIG_ENV_OVERWRITE
 
index 19411885b95177a5865dd54b486015ef47e4cb19..b11423447c315aa45e7e5a633e8b2f9bf30de031 100644 (file)
@@ -27,7 +27,6 @@
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC         /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                /* Enable SEC/CAAM */
 #define CONFIG_ENV_OVERWRITE
 
index e15b0ea88bb9b0a8213915a21c08bc16da74c440..9136bf036ed59f6047ae00d609752469262d9654 100644 (file)
@@ -73,7 +73,6 @@
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCIE1                   /* PCIE controller 1 */
 #define CONFIG_PCIE2                   /* PCIE controller 2 */
index 0f59eb1c1795dce13270f240a59fd5835fe29515..82e4691ca3c0364c5621d1bb9f62bf2e90d2b77b 100644 (file)
@@ -26,7 +26,6 @@
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_PCIE1                   /* PCIE controller 1 */
 #define CONFIG_PCIE2                   /* PCIE controller 2 */
 #define CONFIG_PCIE3                   /* PCIE controller 3 */