]> git.sur5r.net Git - u-boot/commitdiff
AT91SAM9261EK support
authorStelian Pop <stelian@popies.net>
Thu, 8 May 2008 18:52:22 +0000 (20:52 +0200)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Sat, 10 May 2008 09:32:08 +0000 (11:32 +0200)
This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
board.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
15 files changed:
MAINTAINERS
MAKEALL
Makefile
board/atmel/at91sam9261ek/Makefile [new file with mode: 0644]
board/atmel/at91sam9261ek/at91sam9261ek.c [new file with mode: 0644]
board/atmel/at91sam9261ek/config.mk [new file with mode: 0644]
board/atmel/at91sam9261ek/led.c [new file with mode: 0644]
board/atmel/at91sam9261ek/nand.c [new file with mode: 0644]
board/atmel/at91sam9261ek/partition.c [new file with mode: 0644]
cpu/arm926ejs/at91sam9/usb.c
drivers/net/dm9000x.c
include/asm-arm/arch-at91sam9/at91sam9261.h [new file with mode: 0644]
include/asm-arm/arch-at91sam9/at91sam9261_matrix.h [new file with mode: 0644]
include/asm-arm/arch-at91sam9/hardware.h
include/configs/at91sam9261ek.h [new file with mode: 0644]

index 58f833c149197032f6b99931095d6e7623031975..26f31fda5eb0a4f3a2dc97952501d8e61c77392b 100644 (file)
@@ -538,6 +538,7 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
 
        at91cap9adk             ARM926EJS (AT91CAP9 SoC)
        at91sam9260ek           ARM926EJS (AT91SAM9260 SoC)
+       at91sam9261ek           ARM926EJS (AT91SAM9261 SoC)
 
 Stefan Roese <sr@denx.de>
 
diff --git a/MAKEALL b/MAKEALL
index 791eabc7f680fa220b25c9fb5c0c27fe88b1afcf..d4ae09cdcff5375852397a143dbf5ac74b3a32f0 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -459,6 +459,7 @@ LIST_ARM9="                 \
        at91cap9adk             \
        at91rm9200dk            \
        at91sam9260ek           \
+       at91sam9261ek           \
        cmc_pu2                 \
        ap920t                  \
        ap922_XA10              \
index 167a71741c805eb67567fe7043325e486f192b50..5e06ff554e8e3b4a293ae569c380a98aeb79ea9d 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2326,6 +2326,9 @@ shannon_config    :       unconfig
 at91rm9200dk_config    :       unconfig
        @$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
 
+at91sam9261ek_config   :       unconfig
+       @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91sam9
+
 cmc_pu2_config :       unconfig
        @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
 
diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile
new file mode 100644 (file)
index 0000000..7702a9c
--- /dev/null
@@ -0,0 +1,57 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).a
+
+COBJS-y += at91sam9261ek.o
+COBJS-y += led.o
+COBJS-y        += partition.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):        $(obj).depend $(OBJS) $(SOBJS)
+       $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+       rm -f $(SOBJS) $(OBJS)
+
+distclean:     clean
+       rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c
new file mode 100644 (file)
index 0000000..96b4422
--- /dev/null
@@ -0,0 +1,194 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91sam9261_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
+#include <net.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+static void at91sam9261ek_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+       at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
+       at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+#endif
+
+#ifdef CONFIG_USART1
+       at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
+       at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+#endif
+
+#ifdef CONFIG_USART2
+       at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
+       at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+#endif
+
+#ifdef CONFIG_USART3   /* DBGU */
+       at91_set_A_periph(AT91_PIN_PA9, 0);             /* DRXD */
+       at91_set_A_periph(AT91_PIN_PA10, 1);            /* DTXD */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+#endif
+}
+
+#ifdef CONFIG_CMD_NAND
+static void at91sam9261ek_nand_hw_init(void)
+{
+       unsigned long csa;
+
+       /* Enable CS3 */
+       csa = at91_sys_read(AT91_MATRIX_EBICSA);
+       at91_sys_write(AT91_MATRIX_EBICSA,
+                      csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+       /* Configure SMC CS3 for NAND/SmartMedia */
+       at91_sys_write(AT91_SMC_SETUP(3),
+                      AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
+                      AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+       at91_sys_write(AT91_SMC_PULSE(3),
+                      AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) |
+                      AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+       at91_sys_write(AT91_SMC_CYCLE(3),
+                      AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+       at91_sys_write(AT91_SMC_MODE(3),
+                      AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+                      AT91_SMC_EXNWMODE_DISABLE |
+#ifdef CFG_NAND_DBW_16
+                      AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+                      AT91_SMC_DBW_8 |
+#endif
+                      AT91_SMC_TDF_(1));
+
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
+
+       /* Configure RDY/BSY */
+       at91_set_gpio_input(AT91_PIN_PC15, 1);
+
+       /* Enable NandFlash */
+       at91_set_gpio_output(AT91_PIN_PC14, 1);
+
+       at91_set_A_periph(AT91_PIN_PC0, 0);     /* NANDOE */
+       at91_set_A_periph(AT91_PIN_PC1, 0);     /* NANDWE */
+}
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+static void at91sam9261ek_spi_hw_init(void)
+{
+       at91_set_A_periph(AT91_PIN_PA3, 0);     /* SPI0_NPCS0 */
+
+       at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
+       at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
+       at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
+
+       /* Enable clock */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
+}
+#endif
+
+#ifdef CONFIG_DRIVER_DM9000
+static void at91sam9261ek_dm9000_hw_init(void)
+{
+       /* Configure SMC CS2 for DM9000 */
+       at91_sys_write(AT91_SMC_SETUP(2),
+                      AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
+                      AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
+       at91_sys_write(AT91_SMC_PULSE(2),
+                      AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) |
+                      AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
+       at91_sys_write(AT91_SMC_CYCLE(2),
+                      AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
+       at91_sys_write(AT91_SMC_MODE(2),
+                      AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+                      AT91_SMC_EXNWMODE_DISABLE |
+                      AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
+                      AT91_SMC_TDF_(1));
+
+       /* Configure Reset signal as output */
+       at91_set_gpio_output(AT91_PIN_PC10, 0);
+
+       /* Configure Interrupt pin as input, no pull-up */
+       at91_set_gpio_input(AT91_PIN_PC11, 0);
+}
+#endif
+
+int board_init(void)
+{
+       /* Enable Ctrlc */
+       console_init_f();
+
+       /* arch number of AT91SAM9261EK-Board */
+       gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
+       /* adress of boot parameters */
+       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+       at91sam9261ek_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+       at91sam9261ek_nand_hw_init();
+#endif
+#ifdef CONFIG_HAS_DATAFLASH
+       at91sam9261ek_spi_hw_init();
+#endif
+#ifdef CONFIG_DRIVER_DM9000
+       at91sam9261ek_dm9000_hw_init();
+#endif
+       return 0;
+}
+
+int dram_init(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM;
+       gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+       return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+#ifdef CONFIG_DRIVER_DM9000
+       /*
+        * Initialize ethernet HW addr prior to starting Linux,
+        * needed for nfsroot
+        */
+       eth_init(gd->bd);
+#endif
+}
+#endif
diff --git a/board/atmel/at91sam9261ek/config.mk b/board/atmel/at91sam9261ek/config.mk
new file mode 100644 (file)
index 0000000..ff2cfd1
--- /dev/null
@@ -0,0 +1 @@
+TEXT_BASE = 0x23f00000
diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c
new file mode 100644 (file)
index 0000000..eb2bb23
--- /dev/null
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+#define        RED_LED         AT91_PIN_PA23   /* this is the power led */
+#define        GREEN_LED       AT91_PIN_PA13   /* this is the user1 led */
+#define        YELLOW_LED      AT91_PIN_PA14   /* this is the user2 led */
+
+void red_LED_on(void)
+{
+       at91_set_gpio_value(RED_LED, 1);
+}
+
+void red_LED_off(void)
+{
+       at91_set_gpio_value(RED_LED, 0);
+}
+
+void green_LED_on(void)
+{
+       at91_set_gpio_value(GREEN_LED, 0);
+}
+
+void green_LED_off(void)
+{
+       at91_set_gpio_value(GREEN_LED, 1);
+}
+
+void yellow_LED_on(void)
+{
+       at91_set_gpio_value(YELLOW_LED, 0);
+}
+
+void yellow_LED_off(void)
+{
+       at91_set_gpio_value(YELLOW_LED, 1);
+}
+
+
+void coloured_LED_init(void)
+{
+       /* Enable clock */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA);
+
+       at91_set_gpio_output(RED_LED, 1);
+       at91_set_gpio_output(GREEN_LED, 1);
+       at91_set_gpio_output(YELLOW_LED, 1);
+
+       at91_set_gpio_value(RED_LED, 0);
+       at91_set_gpio_value(GREEN_LED, 1);
+       at91_set_gpio_value(YELLOW_LED, 1);
+}
diff --git a/board/atmel/at91sam9261ek/nand.c b/board/atmel/at91sam9261ek/nand.c
new file mode 100644 (file)
index 0000000..35b26db
--- /dev/null
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
+
+#include <nand.h>
+
+/*
+ *     hardware specific access to control-lines
+ */
+#define        MASK_ALE        (1 << 22)       /* our ALE is AD22 */
+#define        MASK_CLE        (1 << 21)       /* our CLE is AD21 */
+
+static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+       struct nand_chip *this = mtd->priv;
+       ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+       IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+       switch (cmd) {
+       case NAND_CTL_SETCLE:
+               IO_ADDR_W |= MASK_CLE;
+               break;
+       case NAND_CTL_SETALE:
+               IO_ADDR_W |= MASK_ALE;
+               break;
+       case NAND_CTL_CLRNCE:
+               at91_set_gpio_value(AT91_PIN_PC14, 1);
+               break;
+       case NAND_CTL_SETNCE:
+               at91_set_gpio_value(AT91_PIN_PC14, 0);
+               break;
+       }
+       this->IO_ADDR_W = (void *) IO_ADDR_W;
+}
+
+static int at91sam9261ek_nand_ready(struct mtd_info *mtd)
+{
+       return at91_get_gpio_value(AT91_PIN_PC15);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+       nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+       nand->options = NAND_BUSWIDTH_16;
+#endif
+       nand->hwcontrol = at91sam9261ek_nand_hwcontrol;
+       nand->dev_ready = at91sam9261ek_nand_ready;
+       nand->chip_delay = 20;
+
+       return 0;
+}
diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c
new file mode 100644 (file)
index 0000000..975be17
--- /dev/null
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <config.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+
+struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
+       {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},      /* Logical adress, CS */
+       {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
+};
+
+/*define the area offsets*/
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+       {0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
+       {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
+       {0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
+       {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
+       {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
+};
index 441349df3af29f2b3cca0adb4c04843699107e66..2a92f734ddc7579463c687d3adaf4eb5f0d7f762 100644 (file)
@@ -33,7 +33,11 @@ int usb_cpu_init(void)
 {
        /* Enable USB host clock. */
        at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
+#ifdef CONFIG_AT91SAM9261
+       at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0);
+#else
        at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP);
+#endif
 
        return 0;
 }
@@ -42,7 +46,11 @@ int usb_cpu_stop(void)
 {
        /* Disable USB host clock. */
        at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP);
+#ifdef CONFIG_AT91SAM9261
+       at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0);
+#else
        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
+#endif
        return 0;
 }
 
index 6131b5c35708c107219310e52dfeae7df20f782a..db6d3bd284d97b5cbc751a3aaf6bb661033bb7e1 100644 (file)
@@ -300,8 +300,10 @@ eth_init(bd_t * bd)
        DM9000_iow(DM9000_ISR, 0x0f);   /* Clear interrupt status */
 
        /* Set Node address */
+#ifndef CONFIG_AT91SAM9261EK
        for (i = 0; i < 6; i++)
                ((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
+#endif
 
        if (is_zero_ether_addr(bd->bi_enetaddr) ||
            is_multicast_ether_addr(bd->bi_enetaddr)) {
diff --git a/include/asm-arm/arch-at91sam9/at91sam9261.h b/include/asm-arm/arch-at91sam9/at91sam9261.h
new file mode 100644 (file)
index 0000000..752d81d
--- /dev/null
@@ -0,0 +1,105 @@
+/*
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261.h]
+ *
+ * Copyright (C) SAN People
+ *
+ * Common definitions.
+ * Based on AT91SAM9261 datasheet revision E. (Preliminary)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91SAM9261_H
+#define AT91SAM9261_H
+
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define AT91_ID_FIQ            0       /* Advanced Interrupt Controller (FIQ) */
+#define AT91_ID_SYS            1       /* System Peripherals */
+#define AT91SAM9261_ID_PIOA    2       /* Parallel IO Controller A */
+#define AT91SAM9261_ID_PIOB    3       /* Parallel IO Controller B */
+#define AT91SAM9261_ID_PIOC    4       /* Parallel IO Controller C */
+#define AT91SAM9261_ID_US0     6       /* USART 0 */
+#define AT91SAM9261_ID_US1     7       /* USART 1 */
+#define AT91SAM9261_ID_US2     8       /* USART 2 */
+#define AT91SAM9261_ID_MCI     9       /* Multimedia Card Interface */
+#define AT91SAM9261_ID_UDP     10      /* USB Device Port */
+#define AT91SAM9261_ID_TWI     11      /* Two-Wire Interface */
+#define AT91SAM9261_ID_SPI0    12      /* Serial Peripheral Interface 0 */
+#define AT91SAM9261_ID_SPI1    13      /* Serial Peripheral Interface 1 */
+#define AT91SAM9261_ID_SSC0    14      /* Serial Synchronous Controller 0 */
+#define AT91SAM9261_ID_SSC1    15      /* Serial Synchronous Controller 1 */
+#define AT91SAM9261_ID_SSC2    16      /* Serial Synchronous Controller 2 */
+#define AT91SAM9261_ID_TC0     17      /* Timer Counter 0 */
+#define AT91SAM9261_ID_TC1     18      /* Timer Counter 1 */
+#define AT91SAM9261_ID_TC2     19      /* Timer Counter 2 */
+#define AT91SAM9261_ID_UHP     20      /* USB Host port */
+#define AT91SAM9261_ID_LCDC    21      /* LDC Controller */
+#define AT91SAM9261_ID_IRQ0    29      /* Advanced Interrupt Controller (IRQ0) */
+#define AT91SAM9261_ID_IRQ1    30      /* Advanced Interrupt Controller (IRQ1) */
+#define AT91SAM9261_ID_IRQ2    31      /* Advanced Interrupt Controller (IRQ2) */
+
+
+/*
+ * User Peripheral physical base addresses.
+ */
+#define AT91SAM9261_BASE_TCB0          0xfffa0000
+#define AT91SAM9261_BASE_TC0           0xfffa0000
+#define AT91SAM9261_BASE_TC1           0xfffa0040
+#define AT91SAM9261_BASE_TC2           0xfffa0080
+#define AT91SAM9261_BASE_UDP           0xfffa4000
+#define AT91SAM9261_BASE_MCI           0xfffa8000
+#define AT91SAM9261_BASE_TWI           0xfffac000
+#define AT91SAM9261_BASE_US0           0xfffb0000
+#define AT91SAM9261_BASE_US1           0xfffb4000
+#define AT91SAM9261_BASE_US2           0xfffb8000
+#define AT91SAM9261_BASE_SSC0          0xfffbc000
+#define AT91SAM9261_BASE_SSC1          0xfffc0000
+#define AT91SAM9261_BASE_SSC2          0xfffc4000
+#define AT91SAM9261_BASE_SPI0          0xfffc8000
+#define AT91SAM9261_BASE_SPI1          0xfffcc000
+#define AT91_BASE_SYS                  0xffffea00
+
+
+/*
+ * System Peripherals (offset from AT91_BASE_SYS)
+ */
+#define AT91_SDRAMC    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SMC       (0xffffec00 - AT91_BASE_SYS)
+#define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
+#define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
+#define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
+#define AT91_PIOA      (0xfffff400 - AT91_BASE_SYS)
+#define AT91_PIOB      (0xfffff600 - AT91_BASE_SYS)
+#define AT91_PIOC      (0xfffff800 - AT91_BASE_SYS)
+#define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
+#define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
+#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
+#define AT91_RTT       (0xfffffd20 - AT91_BASE_SYS)
+#define AT91_PIT       (0xfffffd30 - AT91_BASE_SYS)
+#define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
+#define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
+
+#define AT91_USART0    AT91SAM9261_BASE_US0
+#define AT91_USART1    AT91SAM9261_BASE_US1
+#define AT91_USART2    AT91SAM9261_BASE_US2
+
+
+/*
+ * Internal Memory.
+ */
+#define AT91SAM9261_SRAM_BASE  0x00300000      /* Internal SRAM base address */
+#define AT91SAM9261_SRAM_SIZE  0x00028000      /* Internal SRAM size (160Kb) */
+
+#define AT91SAM9261_ROM_BASE   0x00400000      /* Internal ROM base address */
+#define AT91SAM9261_ROM_SIZE   SZ_32K          /* Internal ROM size (32Kb) */
+
+#define AT91SAM9261_UHP_BASE   0x00500000      /* USB Host controller */
+#define AT91SAM9261_LCDC_BASE  0x00600000      /* LDC controller */
+
+
+#endif
diff --git a/include/asm-arm/arch-at91sam9/at91sam9261_matrix.h b/include/asm-arm/arch-at91sam9/at91sam9261_matrix.h
new file mode 100644 (file)
index 0000000..e2bfc4b
--- /dev/null
@@ -0,0 +1,64 @@
+/*
+ * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h]
+ *
+ * Copyright (C) 2007 Atmel Corporation.
+ *
+ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
+ * Based on AT91SAM9261 datasheet revision D.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91SAM9261_MATRIX_H
+#define AT91SAM9261_MATRIX_H
+
+#define AT91_MATRIX_MCFG       (AT91_MATRIX + 0x00)    /* Master Configuration Register */
+#define                AT91_MATRIX_RCB0        (1 << 0)                /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
+#define                AT91_MATRIX_RCB1        (1 << 1)                /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
+
+#define AT91_MATRIX_SCFG0      (AT91_MATRIX + 0x04)    /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1      (AT91_MATRIX + 0x08)    /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2      (AT91_MATRIX + 0x0C)    /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3      (AT91_MATRIX + 0x10)    /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4      (AT91_MATRIX + 0x14)    /* Slave Configuration Register 4 */
+#define                AT91_MATRIX_SLOT_CYCLE          (0xff << 0)     /* Maximum Number of Allowed Cycles for a Burst */
+#define                AT91_MATRIX_DEFMSTR_TYPE        (3    << 16)    /* Default Master Type */
+#define                        AT91_MATRIX_DEFMSTR_TYPE_NONE   (0 << 16)
+#define                        AT91_MATRIX_DEFMSTR_TYPE_LAST   (1 << 16)
+#define                        AT91_MATRIX_DEFMSTR_TYPE_FIXED  (2 << 16)
+#define                AT91_MATRIX_FIXED_DEFMSTR       (7    << 18)    /* Fixed Index of Default Master */
+
+#define AT91_MATRIX_TCR                (AT91_MATRIX + 0x24)    /* TCM Configuration Register */
+#define                AT91_MATRIX_ITCM_SIZE           (0xf << 0)      /* Size of ITCM enabled memory block */
+#define                        AT91_MATRIX_ITCM_0              (0 << 0)
+#define                        AT91_MATRIX_ITCM_16             (5 << 0)
+#define                        AT91_MATRIX_ITCM_32             (6 << 0)
+#define                        AT91_MATRIX_ITCM_64             (7 << 0)
+#define                AT91_MATRIX_DTCM_SIZE           (0xf << 4)      /* Size of DTCM enabled memory block */
+#define                        AT91_MATRIX_DTCM_0              (0 << 4)
+#define                        AT91_MATRIX_DTCM_16             (5 << 4)
+#define                        AT91_MATRIX_DTCM_32             (6 << 4)
+#define                        AT91_MATRIX_DTCM_64             (7 << 4)
+
+#define AT91_MATRIX_EBICSA     (AT91_MATRIX + 0x30)    /* EBI Chip Select Assignment Register */
+#define                AT91_MATRIX_CS1A                (1 << 1)        /* Chip Select 1 Assignment */
+#define                        AT91_MATRIX_CS1A_SMC            (0 << 1)
+#define                        AT91_MATRIX_CS1A_SDRAMC         (1 << 1)
+#define                AT91_MATRIX_CS3A                (1 << 3)        /* Chip Select 3 Assignment */
+#define                        AT91_MATRIX_CS3A_SMC            (0 << 3)
+#define                        AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
+#define                AT91_MATRIX_CS4A                (1 << 4)        /* Chip Select 4 Assignment */
+#define                        AT91_MATRIX_CS4A_SMC            (0 << 4)
+#define                        AT91_MATRIX_CS4A_SMC_CF1        (1 << 4)
+#define                AT91_MATRIX_CS5A                (1 << 5)        /* Chip Select 5 Assignment */
+#define                        AT91_MATRIX_CS5A_SMC            (0 << 5)
+#define                        AT91_MATRIX_CS5A_SMC_CF2        (1 << 5)
+#define                AT91_MATRIX_DBPUC               (1 << 8)        /* Data Bus Pull-up Configuration */
+
+#define AT91_MATRIX_USBPUCR    (AT91_MATRIX + 0x34)    /* USB Pad Pull-Up Control Register */
+#define                AT91_MATRIX_USBPUCR_PUON        (1 << 30)       /* USB Device PAD Pull-up Enable */
+
+#endif
index d2fe45388b3908b5b97334cd1531599437ff01ec..06bab621f615b1fc5ea046ebb778ad461df8301b 100644 (file)
@@ -26,6 +26,9 @@
 #define AT91_PMC_UHP   AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91SAM9261)
 #include <asm/arch/at91sam9261.h>
+#define AT91_BASE_SPI  AT91SAM9261_BASE_SPI0
+#define AT91_ID_UHP    AT91SAM9261_ID_UHP
+#define AT91_PMC_UHP   AT91SAM926x_PMC_UHP
 #elif defined(CONFIG_AT91SAM9263)
 #include <asm/arch/at91sam9263.h>
 #elif defined(CONFIG_AT91SAM9RL)
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
new file mode 100644 (file)
index 0000000..96fc6af
--- /dev/null
@@ -0,0 +1,191 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * Configuation settings for the AT91SAM9261EK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ARM asynchronous clock */
+#define AT91_MAIN_CLOCK                198656000       /* from 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK      99328000        /* peripheral = main / 2 */
+#define CFG_HZ                 1000000         /* 1us resolution */
+
+#define AT91_SLOW_CLOCK                32768   /* slow clock */
+
+#define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
+#define CONFIG_AT91SAM9261     1       /* It's an Atmel AT91SAM9261 SoC*/
+#define CONFIG_AT91SAM9261EK   1       /* on an AT91SAM9261EK Board    */
+#undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
+
+#define CONFIG_CMDLINE_TAG     1       /* enable passing of ATAGs      */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG      1
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_ATMEL_USART     1
+#undef CONFIG_USART0
+#undef CONFIG_USART1
+#undef CONFIG_USART2
+#define CONFIG_USART3          1       /* USART 3 is DBGU */
+
+#define CONFIG_BOOTDELAY       3
+
+/* #define CONFIG_ENV_OVERWRITE        1 */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE      1
+#define CONFIG_BOOTP_BOOTPATH          1
+#define CONFIG_BOOTP_GATEWAY           1
+#define CONFIG_BOOTP_HOSTNAME          1
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_CMD_PING                1
+#define CONFIG_CMD_DHCP                1
+#define CONFIG_CMD_NAND                1
+#define CONFIG_CMD_USB         1
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS           1
+#define PHYS_SDRAM                     0x20000000
+#define PHYS_SDRAM_SIZE                        0x04000000      /* 64 megs */
+
+/* DataFlash */
+#define CONFIG_HAS_DATAFLASH           1
+#define CFG_SPI_WRITE_TOUT             (5*CFG_HZ)
+#define CFG_MAX_DATAFLASH_BANKS                2
+#define CFG_DATAFLASH_LOGIC_ADDR_CS0   0xC0000000      /* CS0 */
+#define CFG_DATAFLASH_LOGIC_ADDR_CS3   0xD0000000      /* CS3 */
+#define AT91_SPI_CLK                   15000000
+#define DATAFLASH_TCSS                 (0x1a << 16)
+#define DATAFLASH_TCHS                 (0x1 << 24)
+
+/* NAND flash */
+#define NAND_MAX_CHIPS                 1
+#define CFG_MAX_NAND_DEVICE            1
+#define CFG_NAND_BASE                  0x40000000
+#define CFG_NAND_DBW_8                 1
+
+/* NOR flash - no real flash on this board */
+#define CFG_NO_FLASH                   1
+
+/* Ethernet */
+#define CONFIG_DRIVER_DM9000           1
+#define CONFIG_DM9000_BASE             0x30000000
+#define DM9000_IO                      CONFIG_DM9000_BASE
+#define DM9000_DATA                    (CONFIG_DM9000_BASE + 4)
+#define CONFIG_DM9000_USE_16BIT                1
+#define CONFIG_NET_RETRY_COUNT         20
+#define CONFIG_RESET_PHY_R             1
+
+/* USB */
+#define CONFIG_USB_OHCI_NEW            1
+#define LITTLEENDIAN                   1
+#define CONFIG_DOS_PARTITION           1
+#define CFG_USB_OHCI_CPU_INIT          1
+#define CFG_USB_OHCI_REGS_BASE         0x00500000      /* AT91SAM9261_UHP_BASE */
+#define CFG_USB_OHCI_SLOT_NAME         "at91sam9261"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS    2
+#define CONFIG_USB_STORAGE             1
+
+#define CFG_LOAD_ADDR                  0x22000000      /* load address */
+
+#define CFG_MEMTEST_START              PHYS_SDRAM
+#define CFG_MEMTEST_END                        0x23e00000
+
+#define CFG_USE_DATAFLASH_CS0          1
+#undef CFG_USE_NANDFLASH
+
+#ifdef CFG_USE_DATAFLASH_CS0
+
+/* bootstrap + u-boot + env + linux in dataflash on CS0 */
+#define CFG_ENV_IS_IN_DATAFLASH        1
+#define CFG_MONITOR_BASE       (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
+#define CFG_ENV_OFFSET         0x4200
+#define CFG_ENV_ADDR           (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
+#define CFG_ENV_SIZE           0x4200
+#define CONFIG_BOOTCOMMAND     "cp.b 0xC0042000 0x22000000 0x210000; bootm"
+#define CONFIG_BOOTARGS                "console=ttyS0,115200 "                 \
+                               "root=/dev/mtdblock0 "                  \
+                               "mtdparts=at91_nand:-(root) "           \
+                               "rw rootfstype=jffs2"
+
+#else /* CFG_USE_NANDFLASH */
+
+/* bootstrap + u-boot + env + linux in nandflash */
+#define CFG_ENV_IS_IN_NAND     1
+#define CFG_ENV_OFFSET         0x60000
+#define CFG_ENV_OFFSET_REDUND  0x80000
+#define CFG_ENV_SIZE           0x20000         /* 1 sector = 128 kB */
+#define CONFIG_BOOTCOMMAND     "nand read 0x22000000 0xA0000 0x200000; bootm"
+#define CONFIG_BOOTARGS                "console=ttyS0,115200 "                 \
+                               "root=/dev/mtdblock5 "                  \
+                               "mtdparts=at91_nand:128k(bootstrap)ro," \
+                               "256k(uboot)ro,128k(env1)ro,"           \
+                               "128k(env2)ro,2M(linux),-(root) "       \
+                               "rw rootfstype=jffs2"
+
+#endif
+
+#define CONFIG_BAUDRATE                115200
+#define CFG_BAUDRATE_TABLE     {115200 , 19200, 38400, 57600, 9600 }
+
+#define CFG_PROMPT             "U-Boot> "
+#define CFG_CBSIZE             256
+#define CFG_MAXARGS            16
+#define CFG_PBSIZE             (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_LONGHELP           1
+#define CONFIG_CMDLINE_EDITING 1
+
+#define ROUND(A, B)            (((A) + (B)) & ~((B) - 1))
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN         ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
+#define CFG_GBL_DATA_SIZE      128     /* 128 bytes for initial data */
+
+#define CONFIG_STACKSIZE       (32*1024)       /* regular stack */
+
+#ifdef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ not supported
+#endif
+
+#endif