MPC83XX: Fix GPIO configuration - set gpio level before direction

Set DAT value before DIR values to avoid creating glitches on the
GPIO signals.

Set gpio level register before direction register to inhibit
glitches on high level output pins.

Dir and data gets cleared at powerup, so high level output lines see
a short low pulse between setting the direction and level registers.

Issue was seen on a new board with the nReset line of the NOR flash
connected to a GPIO. Setting the direction register puts the NOR flash
in reset so the next instruction to set the level cannot get executed.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 67c9e570c31d46710c614f3d9ca594d8453d9d9a..4514dbb7df2f24c71bc6bf808f272ad298e13a1e 100644 (file)
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -283,12 +283,12 @@ void cpu_init_f (volatile immap_t * im)
        im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM;
 #endif
 #ifdef CFG_GPIO1_PRELIM
-       im->gpio[0].dir = CFG_GPIO1_DIR;
        im->gpio[0].dat = CFG_GPIO1_DAT;
+       im->gpio[0].dir = CFG_GPIO1_DIR;
 #endif
 #ifdef CFG_GPIO2_PRELIM
-       im->gpio[1].dir = CFG_GPIO2_DIR;
        im->gpio[1].dat = CFG_GPIO2_DAT;
+       im->gpio[1].dir = CFG_GPIO2_DIR;
 #endif
 }