Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
config TARGET_LS1046AQDS
bool "Support ls1046aqds"
+ select ARCH_LS1046A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
config TARGET_LS1046ARDB
bool "Support ls1046ardb"
+ select ARCH_LS1046A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
source "arch/arm/cpu/armv7/omap-common/Kconfig"
+source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
+
source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-rmobile/Kconfig"
--- /dev/null
+config ARCH_LS1046A
+ bool "Freescale Layerscape LS1046A SoC"
obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
endif
-ifneq ($(CONFIG_LS1046A),)
+ifneq ($(CONFIG_ARCH_LS1046A),)
obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
endif
dsb sy
#endif
-#ifdef CONFIG_LS1046A
+#ifdef CONFIG_ARCH_LS1046A
/* Initialize the L2 RAM latency */
mrs x1, S3_1_c11_c0_2
mov x0, #0x1C7
{
struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
-#ifdef CONFIG_LS1046A
+#ifdef CONFIG_ARCH_LS1046A
/* Disable SATA ECC */
out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
#endif
#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
#define _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
+#include <linux/kconfig.h>
#include <fsl_ddrc_version.h>
#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
-#elif defined(CONFIG_LS1046A)
+#elif defined(CONFIG_ARCH_LS1046A)
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_NUM_FMAN 1
obj-$(CONFIG_PPC_B4420) += b4860.o
obj-$(CONFIG_PPC_B4860) += b4860.o
obj-$(CONFIG_LS1043A) += ls1043.o
-obj-$(CONFIG_LS1046A) += ls1046.o
+obj-$(CONFIG_ARCH_LS1046A) += ls1046.o
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_FSL_LSCH2
-#define CONFIG_LS1046A
#define CONFIG_MP
#define CONFIG_SYS_FSL_CLK
#define CONFIG_GICV2