select SUPPORT_SPL
        select SUPPORT_TPL
 
+config TARGET_P1021RDB
+       bool "Support P1021RDB"
+       select SUPPORT_SPL
+       select SUPPORT_TPL
+
 config TARGET_P1_P2_RDB_PC
        bool "Support p1_p2_rdb_pc"
        select SUPPORT_SPL
 
        TARGET_P1020MBG         || \
        TARGET_P1020RDB_PC      || \
        TARGET_P1020RDB_PD      || \
-       TARGET_P1020UTM
+       TARGET_P1020UTM         || \
+       TARGET_P1021RDB
 
 config SYS_BOARD
        default "p1_p2_rdb_pc"
 
 
 #ifdef CONFIG_SYS_DDR_RAW_TIMING
 #if    defined(CONFIG_P1020RDB_PROTO) || \
-       defined(CONFIG_P1021RDB) || \
+       defined(CONFIG_TARGET_P1021RDB) || \
        defined(CONFIG_TARGET_P1020UTM)
 /* Micron MT41J256M8_187E */
 dimm_params_t ddr_raw_timing = {
 
 #define GPIO_SLIC_PIN          30
 #define GPIO_SLIC_DATA         (1 << (31 - GPIO_SLIC_PIN))
 
-#if defined(CONFIG_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_TARGET_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
 #define GPIO_DDR_RST_PORT      1
 #define GPIO_DDR_RST_PIN       8
 #define GPIO_DDR_RST_DATA      (1 << (31 - GPIO_DDR_RST_PIN))
 #define GPIO_2BIT_MASK         (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
 #endif
 
-#if defined(CONFIG_P1025RDB) || defined(CONFIG_P1021RDB)
+#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
 #define PCA_IOPORT_I2C_ADDR            0x23
 #define PCA_IOPORT_OUTPUT_CMD          0x2
 #define PCA_IOPORT_CFG_CMD             0x6
 const qe_iop_conf_t qe_iop_conf_tab[] = {
        /* GPIO */
        {1,   1, 2, 0, 0}, /* GPIO7/PB1   - LOAD_DEFAULT_N */
-#if defined(CONFIG_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_TARGET_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
        {1,   8, 1, 1, 0}, /* GPIO10/PB8  - DDR_RST */
 #endif
        {0,  15, 1, 0, 0}, /* GPIO11/A15  - WDI */
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
        par_io_t *par_io = (par_io_t *) &(gur->qe_par_io);
 
-#if defined(CONFIG_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_TARGET_P1021RDB) && !defined(CONFIG_SYS_RAMBOOT)
        /* reset DDR3 */
        setbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdat, GPIO_DDR_RST_DATA);
        udelay(1000);
 }
 
 #if defined(CONFIG_QE) && \
-       (defined(CONFIG_P1025RDB) || defined(CONFIG_P1021RDB))
+       (defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
 static void fdt_board_fixup_qe_pins(void *blob)
 {
        unsigned int oldbus;
 #ifdef CONFIG_QE
        do_fixup_by_compat(blob, "fsl,qe", "status", "okay",
                        sizeof("okay"), 0);
-#if defined(CONFIG_P1025RDB) || defined(CONFIG_P1021RDB)
+#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
        fdt_board_fixup_qe_pins(blob);
 #endif
 #endif
 
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_TPL=y
 
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 
 CONFIG_PPC=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_TPL=y
 
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 
 CONFIG_PPC=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1021RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1021RDB"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 
                        "57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
 #endif
 
-#if defined(CONFIG_P1021RDB)
+#if defined(CONFIG_TARGET_P1021RDB)
 #define CONFIG_BOARDNAME "P1021RDB-PC"
 #define CONFIG_NAND_FSL_ELBC
 #define CONFIG_P1021
 
 CONFIG_OVERWRITE_ETHADDR_ONCE
 CONFIG_P1020
 CONFIG_P1021
-CONFIG_P1021RDB
 CONFIG_P1024
 CONFIG_P1024RDB
 CONFIG_P1025