Add register define of DBSC3 operation adjustment register,
and add initial value.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 #define DBSC3_1_QOS_W13_BASE   0xE67A2D00
 #define DBSC3_1_QOS_W14_BASE   0xE67A2E00
 #define DBSC3_1_QOS_W15_BASE   0xE67A2F00
+#define DBSC3_1_DBADJ2         0xE67A00C8
 
 #define R8A7791_CUT_ES2X       2
 #define IS_R8A7791_ES2()       \
 
 
        /* DBSC DBADJ2 */
        writel(0x20042004, DBSC3_0_DBADJ2);
+       writel(0x20042004, DBSC3_1_DBADJ2);
 
        /* S3C -QoS */
        s3c = (struct rcar_s3c *)S3C_BASE;