arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning

Fix:

ctrl_regs.c: In function 'set_ddr_sdram_cfg_2':
ctrl_regs.c:641:15: warning: variable 'rcw_en' set but not used [-Wunused-but-set-variable]
ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
ctrl_regs.c:951:31: warning: array subscript is above array bounds [-Warray-bounds]
ctrl_regs.c:752:34: warning: array subscript is above array bounds [-Warray-bounds]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index 15cd375ae367c94f74b52836a858460d3b53091c..2067d53ad28cefadb7d4e781455ce0c85ffdab5c 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -672,7 +672,6 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
                rcw_en = 1;
                ap_en = popts->ap_en;
        } else {
-               rcw_en = 0;
                ap_en = 0;
        }
 
@@ -702,9 +701,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
                | ((obc_cfg & 0x1) << 6)
                | ((ap_en & 0x1) << 5)
                | ((d_init & 0x1) << 4)
-#ifdef CONFIG_FSL_DDR3
                | ((rcw_en & 0x1) << 2)
-#endif
                | ((md_en & 0x1) << 0)
                );
        debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2);
@@ -745,7 +742,7 @@ static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr,
 
 #ifdef CONFIG_FSL_DDR3
        if (unq_mrs_en) {       /* unique mode registers are supported */
-               for (i = 1; i < 4; i++) {
+               for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
                        if (popts->rtt_override)
                                rtt_wr = popts->rtt_wr_override_value;
                        else
@@ -944,7 +941,7 @@ static void set_ddr_sdram_mode(fsl_ddr_cfg_regs_t *ddr,
        debug("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode);
 
        if (unq_mrs_en) {       /* unique mode registers are supported */
-               for (i = 1; i < 4; i++) {
+               for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
                        if (popts->rtt_override)
                                rtt = popts->rtt_override_value;
                        else