AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed.
The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board.
It is essentially the same, with a few minor differences.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/product_card.asp?part_id=4337
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
        at91sam9260ek   \
        at91sam9261ek   \
        at91sam9263ek   \
+       at91sam9g20ek   \
        at91sam9rlek    \
        cmc_pu2         \
        csb637          \
 
 at91sam9260ek_nandflash_config \
 at91sam9260ek_dataflash_cs0_config \
 at91sam9260ek_dataflash_cs1_config \
-at91sam9260ek_config   :       unconfig
-       @mkdir -p $(obj)include
+at91sam9260ek_config \
+at91sam9g20ek_nandflash_config \
+at91sam9g20ek_dataflash_cs0_config \
+at91sam9g20ek_dataflash_cs1_config \
+at91sam9g20ek_config   :       unconfig
+       @mkdir -p $(obj)include
+       @if [ "$(findstring 9g20,$@)" ] ; then \
+               echo "#define CONFIG_AT91SAM9G20EK 1"   >>$(obj)include/config.h ; \
+               $(XECHO) "... 9G20 Variant" ; \
+       else \
+               echo "#define CONFIG_AT91SAM9260EK 1"   >>$(obj)include/config.h ; \
+       fi;
        @if [ "$(findstring _nandflash,$@)" ] ; then \
                echo "#define CONFIG_SYS_USE_NANDFLASH 1"       >>$(obj)include/config.h ; \
                $(XECHO) "... with environment variable in NAND FLASH" ; \
 
        /* Enable Ctrlc */
        console_init_f();
 
+#ifdef CONFIG_AT91SAM9G20EK
+       /* arch number of AT91SAM9260EK-Board */
+       gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
+#else
        /* arch number of AT91SAM9260EK-Board */
        gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
+#endif
        /* adress of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
 
 COBJS-y                                += at91sam9260_serial.o
 COBJS-$(CONFIG_HAS_DATAFLASH)  += at91sam9260_spi.o
 endif
+ifdef CONFIG_AT91SAM9G20
+COBJS-$(CONFIG_MACB)           += at91sam9260_macb.o
+COBJS-y                                += at91sam9260_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)  += at91sam9260_spi.o
+endif
 ifdef CONFIG_AT91SAM9261
 COBJS-y                                += at91sam9261_serial.o
 COBJS-$(CONFIG_HAS_DATAFLASH)  += at91sam9261_spi.o
 
 {
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
        /* Enable PLLB */
        at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB);
        while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
 #endif
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
        /* Disable PLLB */
        at91_sys_write(AT91_CKGR_PLLBR, 0);
        while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
 
 http://atmel.com/dyn/products/tools.asp?family_id=605#1443
 
 ------------------------------------------------------------------------------
-AT91SAM9260EK & AT91SAM9XEEK
+AT91SAM9260EK, AT91SAM9G20EK & AT91SAM9XEEK
 ------------------------------------------------------------------------------
 
 Memory map
 
        /* choose RMII or MII mode. This depends on the board */
 #ifdef CONFIG_RMII
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
        macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
 #else
        macb_writel(macb, USRIO, 0);
 #endif
 #else
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
        macb_writel(macb, USRIO, MACB_BIT(CLKEN));
 #else
        macb_writel(macb, USRIO, MACB_BIT(MII));
 
 
 #if defined(CONFIG_AT91RM9200)
 #include <asm/arch/at91rm9200.h>
-#elif defined(CONFIG_AT91SAM9260)
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
 #include <asm/arch/at91sam9260.h>
 #define AT91_BASE_SPI  AT91SAM9260_BASE_SPI0
 #define AT91_ID_UHP    AT91SAM9260_ID_UHP
 
  * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
- * Configuation settings for the AT91SAM9260EK board.
+ * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91SAM9260"
 #define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK      100000000       /* peripheral */
-#define AT91_CPU_CLOCK         200000000       /* cpu */
 #define CONFIG_SYS_AT91_PLLB   0x107c3e18      /* PLLB settings for USB */
 #define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
+
+#ifdef CONFIG_AT91SAM9G20EK
+#define AT91_CPU_NAME          "AT91SAM9G20"
+#define AT91_MASTER_CLOCK      132000000       /* peripheral */
+#define AT91_CPU_CLOCK         396000000       /* cpu */
+#define CONFIG_AT91SAM9G20     1       /* It's an Atmel AT91SAM9G20 SoC*/
+#else
+#define AT91_CPU_NAME          "AT91SAM9260"
+#define AT91_MASTER_CLOCK      100000000       /* peripheral */
+#define AT91_CPU_CLOCK         200000000       /* cpu */
 #define CONFIG_AT91SAM9260     1       /* It's an Atmel AT91SAM9260 SoC*/
-#define CONFIG_AT91SAM9260EK   1       /* on an AT91SAM9260EK Board    */
+#endif
+
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff  */
 
 #define CONFIG_CMDLINE_TAG     1       /* enable passing of ATAGs      */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1    0xD0000000      /* CS1 */
 #define AT91_SPI_CLK                   15000000
+
+#ifdef CONFIG_AT91SAM9G20EK
+#define DATAFLASH_TCSS                 (0x22 << 16)
+#else
 #define DATAFLASH_TCSS                 (0x1a << 16)
+#endif
 #define DATAFLASH_TCHS                 (0x1 << 24)
 
 /* NAND flash */