Pass dimm parameters to populate populate controller options

Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.

* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>

diff --git a/board/atum8548/ddr.c b/board/atum8548/ddr.c
index f07d746c2054bf1c17ce68b7ec382dea198816dd..ab64fa88f2655916348963351f08d0e277fbc3f1 100644 (file)
--- a/board/atum8548/ddr.c
+++ b/board/atum8548/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -37,7 +38,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8536ds/ddr.c b/board/freescale/mpc8536ds/ddr.c
index 2e88c793317f063f5e27a5abfc780ef28e072c3b..3135d6dfe4bdd27c303c6d486c53a7794106b216 100644 (file)
--- a/board/freescale/mpc8536ds/ddr.c
+++ b/board/freescale/mpc8536ds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
 {
@@ -36,7 +37,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8540ads/ddr.c b/board/freescale/mpc8540ads/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/freescale/mpc8540ads/ddr.c
+++ b/board/freescale/mpc8540ads/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/freescale/mpc8541cds/ddr.c b/board/freescale/mpc8541cds/ddr.c
index 11ce57d3621918644bcb8d9360fcd191bfc74e0b..c84a6cbe1c7715fcfd1b7ec11aecef5a32339da7 100644 (file)
--- a/board/freescale/mpc8541cds/ddr.c
+++ b/board/freescale/mpc8541cds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -36,7 +37,9 @@ void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8544ds/ddr.c b/board/freescale/mpc8544ds/ddr.c
index bbb5ee2c4ab16cb2aef31b067d0555c193e616d2..34f84a2656212e6655465e0289d2b9a897866fee 100644 (file)
--- a/board/freescale/mpc8544ds/ddr.c
+++ b/board/freescale/mpc8544ds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -37,7 +38,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8548cds/ddr.c b/board/freescale/mpc8548cds/ddr.c
index f07d746c2054bf1c17ce68b7ec382dea198816dd..ab64fa88f2655916348963351f08d0e277fbc3f1 100644 (file)
--- a/board/freescale/mpc8548cds/ddr.c
+++ b/board/freescale/mpc8548cds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -37,7 +38,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8555cds/ddr.c b/board/freescale/mpc8555cds/ddr.c
index 11ce57d3621918644bcb8d9360fcd191bfc74e0b..c84a6cbe1c7715fcfd1b7ec11aecef5a32339da7 100644 (file)
--- a/board/freescale/mpc8555cds/ddr.c
+++ b/board/freescale/mpc8555cds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -36,7 +37,9 @@ void fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8560ads/ddr.c b/board/freescale/mpc8560ads/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/freescale/mpc8560ads/ddr.c
+++ b/board/freescale/mpc8560ads/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/freescale/mpc8568mds/ddr.c b/board/freescale/mpc8568mds/ddr.c
index 1b8ecec5a98fc7dfe5cf27ebf5206131dd9dd896..482fd919f5428ad60cdbfb19dda4c57402d1e3ee 100644 (file)
--- a/board/freescale/mpc8568mds/ddr.c
+++ b/board/freescale/mpc8568mds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -38,7 +39,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8572ds/ddr.c b/board/freescale/mpc8572ds/ddr.c
index 5f8c55504c03c4a73106f0b417f0d95d85391971..435893a4ec9bbcdea20fd2d895a08599296b1032 100644 (file)
--- a/board/freescale/mpc8572ds/ddr.c
+++ b/board/freescale/mpc8572ds/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
 {
@@ -38,7 +39,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8610hpcd/ddr.c b/board/freescale/mpc8610hpcd/ddr.c
index 2d22da17770bd5dd8dc99e01cde02bd02298de5a..414ac243a5b77c9818522b346d09a21c3be0e372 100644 (file)
--- a/board/freescale/mpc8610hpcd/ddr.c
+++ b/board/freescale/mpc8610hpcd/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -36,7 +37,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/freescale/mpc8641hpcn/ddr.c b/board/freescale/mpc8641hpcn/ddr.c
index 5163abf0522de6fbc2e6cd1b9309001aefcdcd45..23497f982587748d872b8b6ce2da4c7c69b67756 100644 (file)
--- a/board/freescale/mpc8641hpcn/ddr.c
+++ b/board/freescale/mpc8641hpcn/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -45,7 +46,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/mpc8540eval/ddr.c b/board/mpc8540eval/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/mpc8540eval/ddr.c
+++ b/board/mpc8540eval/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/pm854/ddr.c b/board/pm854/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/pm854/ddr.c
+++ b/board/pm854/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/pm856/ddr.c b/board/pm856/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/pm856/ddr.c
+++ b/board/pm856/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/sbc8548/ddr.c b/board/sbc8548/ddr.c
index f07d746c2054bf1c17ce68b7ec382dea198816dd..ab64fa88f2655916348963351f08d0e277fbc3f1 100644 (file)
--- a/board/sbc8548/ddr.c
+++ b/board/sbc8548/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -37,7 +38,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/sbc8560/ddr.c b/board/sbc8560/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/sbc8560/ddr.c
+++ b/board/sbc8560/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/sbc8641d/ddr.c b/board/sbc8641d/ddr.c
index 5163abf0522de6fbc2e6cd1b9309001aefcdcd45..23497f982587748d872b8b6ce2da4c7c69b67756 100644 (file)
--- a/board/sbc8641d/ddr.c
+++ b/board/sbc8641d/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -45,7 +46,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/socrates/ddr.c b/board/socrates/ddr.c
index 62a5951831f79c977560a78ef992a0538cd6ac5d..2b62b847054accf192d5fa77513cf3e9c70e98ec 100644 (file)
--- a/board/socrates/ddr.c
+++ b/board/socrates/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -37,7 +38,9 @@ void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for clock adjust:

diff --git a/board/stxgp3/ddr.c b/board/stxgp3/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/stxgp3/ddr.c
+++ b/board/stxgp3/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/board/stxssa/ddr.c b/board/stxssa/ddr.c
index 45372f42713cafad729a03924cfe5bb87e96b7b8..7850794d64ff0f6339bc07c3bd4097e73421f73e 100644 (file)
--- a/board/stxssa/ddr.c
+++ b/board/stxssa/ddr.c
@@ -10,6 +10,7 @@
 #include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
 static void
 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
@@ -40,7 +41,9 @@ fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
        }
 }
 
-void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
+void fsl_ddr_board_options(memctl_options_t *popts,
+                               dimm_params_t *pdimm,
+                               unsigned int ctrl_num)
 {
        /*
         * Factors to consider for CPO:

diff --git a/cpu/mpc8xxx/ddr/ddr.h b/cpu/mpc8xxx/ddr/ddr.h
index 0d79be32219c26826a40314e4b287eb208409530..9ffd5485cdca5d2d155606e19d1a12f0e5b74e06 100644 (file)
--- a/cpu/mpc8xxx/ddr/ddr.h
+++ b/cpu/mpc8xxx/ddr/ddr.h
@@ -10,8 +10,8 @@
 #define FSL_DDR_MAIN_H
 
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
 
-#include "ddr1_2_dimm_params.h"
 #include "common_timing_params.h"
 
 /*
@@ -71,6 +71,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
                                      unsigned int number_of_dimms);
 extern unsigned int populate_memctl_options(int all_DIMMs_registered,
                                memctl_options_t *popts,
+                               dimm_params_t *pdimm,
                                unsigned int ctrl_num);
 
 extern unsigned int mclk_to_picos(unsigned int mclk);

diff --git a/cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h b/cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h
deleted file mode 100644 (file)
index c794eed..0000000
--- a/cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright 2008 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- */
-
-#ifndef DDR2_DIMM_PARAMS_H
-#define DDR2_DIMM_PARAMS_H
-
-/* Parameters for a DDR2 dimm computed from the SPD */
-typedef struct dimm_params_s {
-
-       /* DIMM organization parameters */
-       char mpart[19];         /* guaranteed null terminated */
-
-       unsigned int n_ranks;
-       unsigned long long rank_density;
-       unsigned long long capacity;
-       unsigned int data_width;
-       unsigned int primary_sdram_width;
-       unsigned int ec_sdram_width;
-       unsigned int registered_dimm;
-
-       /* SDRAM device parameters */
-       unsigned int n_row_addr;
-       unsigned int n_col_addr;
-       unsigned int edc_config;        /* 0 = none, 1 = parity, 2 = ECC */
-       unsigned int n_banks_per_sdram_device;
-       unsigned int burst_lengths_bitmask;     /* BL=4 bit 2, BL=8 = bit 3 */
-       unsigned int row_density;
-
-       /* used in computing base address of DIMMs */
-       unsigned long long base_address;
-
-       /* DIMM timing parameters */
-
-       /*
-        * SDRAM clock periods
-        * The range for these are 1000-10000 so a short should be sufficient
-        */
-       unsigned int tCKmin_X_ps;
-       unsigned int tCKmin_X_minus_1_ps;
-       unsigned int tCKmin_X_minus_2_ps;
-       unsigned int tCKmax_ps;
-
-       /* SPD-defined CAS latencies */
-       unsigned int caslat_X;
-       unsigned int caslat_X_minus_1;
-       unsigned int caslat_X_minus_2;
-
-       unsigned int caslat_lowest_derated;     /* Derated CAS latency */
-
-       /* basic timing parameters */
-       unsigned int tRCD_ps;
-       unsigned int tRP_ps;
-       unsigned int tRAS_ps;
-
-       unsigned int tWR_ps;    /* maximum = 63750 ps */
-       unsigned int tWTR_ps;   /* maximum = 63750 ps */
-       unsigned int tRFC_ps;   /* max = 255 ns + 256 ns + .75 ns
-                                      = 511750 ps */
-
-       unsigned int tRRD_ps;   /* maximum = 63750 ps */
-       unsigned int tRC_ps;    /* maximum = 254 ns + .75 ns = 254750 ps */
-
-       unsigned int refresh_rate_ps;
-
-       unsigned int tIS_ps;    /* byte 32, spd->ca_setup */
-       unsigned int tIH_ps;    /* byte 33, spd->ca_hold */
-       unsigned int tDS_ps;    /* byte 34, spd->data_setup */
-       unsigned int tDH_ps;    /* byte 35, spd->data_hold */
-       unsigned int tRTP_ps;   /* byte 38, spd->trtp */
-       unsigned int tDQSQ_max_ps;      /* byte 44, spd->tdqsq */
-       unsigned int tQHS_ps;   /* byte 45, spd->tqhs */
-} dimm_params_t;
-
-extern unsigned int ddr_compute_dimm_parameters(
-                                        const generic_spd_eeprom_t *spd,
-                                        dimm_params_t *pdimm,
-                                        unsigned int dimm_number);
-
-#endif

diff --git a/cpu/mpc8xxx/ddr/main.c b/cpu/mpc8xxx/ddr/main.c
index d26c5c5c29ae08ac84665c448f44c8c2e9f1bba3..700b8971729f84dccced25b04306bc682d7f59d5 100644 (file)
--- a/cpu/mpc8xxx/ddr/main.c
+++ b/cpu/mpc8xxx/ddr/main.c
@@ -319,7 +319,8 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step)
                         */
                        populate_memctl_options(
                                        timing_params[i].all_DIMMs_registered,
-                                       &pinfo->memctl_opts[i], i);
+                                       &pinfo->memctl_opts[i],
+                                       pinfo->dimm_params[i], i);
                }
 
        case STEP_ASSIGN_ADDRESSES:

diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c
index 6c2b43c0c59925f0c4d88ad15d639d7a875b0729..99b56856641c6305f3256b0c4e3429c68cc84460 100644 (file)
--- a/cpu/mpc8xxx/ddr/options.c
+++ b/cpu/mpc8xxx/ddr/options.c
@@ -13,10 +13,12 @@
 
 /* Board-specific functions defined in each board's ddr.c */
 extern void fsl_ddr_board_options(memctl_options_t *popts,
+               dimm_params_t *pdimm,
                unsigned int ctrl_num);
 
 unsigned int populate_memctl_options(int all_DIMMs_registered,
                        memctl_options_t *popts,
+                       dimm_params_t *pdimm,
                        unsigned int ctrl_num)
 {
        unsigned int i;
@@ -191,7 +193,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
         * controllers.
         */
 
-       fsl_ddr_board_options(popts, ctrl_num);
+       fsl_ddr_board_options(popts, pdimm, ctrl_num);
 
        return 0;
 }

diff --git a/include/asm-ppc/fsl_ddr_dimm_params.h b/include/asm-ppc/fsl_ddr_dimm_params.h
new file mode 100644 (file)
index 0000000..c794eed
--- /dev/null
+++ b/include/asm-ppc/fsl_ddr_dimm_params.h
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ */
+
+#ifndef DDR2_DIMM_PARAMS_H
+#define DDR2_DIMM_PARAMS_H
+
+/* Parameters for a DDR2 dimm computed from the SPD */
+typedef struct dimm_params_s {
+
+       /* DIMM organization parameters */
+       char mpart[19];         /* guaranteed null terminated */
+
+       unsigned int n_ranks;
+       unsigned long long rank_density;
+       unsigned long long capacity;
+       unsigned int data_width;
+       unsigned int primary_sdram_width;
+       unsigned int ec_sdram_width;
+       unsigned int registered_dimm;
+
+       /* SDRAM device parameters */
+       unsigned int n_row_addr;
+       unsigned int n_col_addr;
+       unsigned int edc_config;        /* 0 = none, 1 = parity, 2 = ECC */
+       unsigned int n_banks_per_sdram_device;
+       unsigned int burst_lengths_bitmask;     /* BL=4 bit 2, BL=8 = bit 3 */
+       unsigned int row_density;
+
+       /* used in computing base address of DIMMs */
+       unsigned long long base_address;
+
+       /* DIMM timing parameters */
+
+       /*
+        * SDRAM clock periods
+        * The range for these are 1000-10000 so a short should be sufficient
+        */
+       unsigned int tCKmin_X_ps;
+       unsigned int tCKmin_X_minus_1_ps;
+       unsigned int tCKmin_X_minus_2_ps;
+       unsigned int tCKmax_ps;
+
+       /* SPD-defined CAS latencies */
+       unsigned int caslat_X;
+       unsigned int caslat_X_minus_1;
+       unsigned int caslat_X_minus_2;
+
+       unsigned int caslat_lowest_derated;     /* Derated CAS latency */
+
+       /* basic timing parameters */
+       unsigned int tRCD_ps;
+       unsigned int tRP_ps;
+       unsigned int tRAS_ps;
+
+       unsigned int tWR_ps;    /* maximum = 63750 ps */
+       unsigned int tWTR_ps;   /* maximum = 63750 ps */
+       unsigned int tRFC_ps;   /* max = 255 ns + 256 ns + .75 ns
+                                      = 511750 ps */
+
+       unsigned int tRRD_ps;   /* maximum = 63750 ps */
+       unsigned int tRC_ps;    /* maximum = 254 ns + .75 ns = 254750 ps */
+
+       unsigned int refresh_rate_ps;
+
+       unsigned int tIS_ps;    /* byte 32, spd->ca_setup */
+       unsigned int tIH_ps;    /* byte 33, spd->ca_hold */
+       unsigned int tDS_ps;    /* byte 34, spd->data_setup */
+       unsigned int tDH_ps;    /* byte 35, spd->data_hold */
+       unsigned int tRTP_ps;   /* byte 38, spd->trtp */
+       unsigned int tDQSQ_max_ps;      /* byte 44, spd->tdqsq */
+       unsigned int tQHS_ps;   /* byte 45, spd->tqhs */
+} dimm_params_t;
+
+extern unsigned int ddr_compute_dimm_parameters(
+                                        const generic_spd_eeprom_t *spd,
+                                        dimm_params_t *pdimm,
+                                        unsigned int dimm_number);
+
+#endif