]> git.sur5r.net Git - u-boot/commitdiff
powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width
authorYork Sun <yorksun@freescale.com>
Thu, 26 May 2011 23:25:48 +0000 (07:25 +0800)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 11 Jul 2011 18:24:19 +0000 (13:24 -0500)
If the bus width is 32-bit, burst chop should be disabled and burst length
should be 8. Read from SPD or other source to determine the width.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc8xxx/ddr/options.c

index 6ccc3b0c70ea260a927bab4026bc9c957abebc4a..80c7046478ef2ab6df4a1d233e301235faf3fdc1 100644 (file)
@@ -418,8 +418,19 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
        /* Choose dynamic power management mode. */
        popts->dynamic_power = 0;
 
-       /* 0 = 64-bit, 1 = 32-bit, 2 = 16-bit */
-       popts->data_bus_width = 0;
+       /*
+        * check first dimm for primary sdram width
+        * presuming all dimms are similar
+        * 0 = 64-bit, 1 = 32-bit, 2 = 16-bit
+        */
+       if (pdimm[0].primary_sdram_width == 64)
+               popts->data_bus_width = 0;
+       else if (pdimm[0].primary_sdram_width == 32)
+               popts->data_bus_width = 1;
+       else if (pdimm[0].primary_sdram_width == 16)
+               popts->data_bus_width = 2;
+       else
+               panic("Error: invalid primary sdram width!\n");
 
        /* Choose burst length. */
 #if defined(CONFIG_FSL_DDR3)
@@ -427,8 +438,13 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
        popts->OTF_burst_chop_en = 0;   /* on-the-fly burst chop disable */
        popts->burst_length = DDR_BL8;  /* Fixed 8-beat burst len */
 #else
-       popts->OTF_burst_chop_en = 1;   /* on-the-fly burst chop */
-       popts->burst_length = DDR_OTF;  /* on-the-fly BC4 and BL8 */
+       if (popts->data_bus_width == 1) {       /* 32-bit bus */
+               popts->OTF_burst_chop_en = 0;
+               popts->burst_length = DDR_BL8;
+       } else {
+               popts->OTF_burst_chop_en = 1;   /* on-the-fly burst chop */
+               popts->burst_length = DDR_OTF;  /* on-the-fly BC4 and BL8 */
+       }
 #endif
 #else
        popts->burst_length = DDR_BL4;  /* has to be 4 for DDR2 */