bool
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008407
+ select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009798
Offset for CCI400 base.
CCI400 base addr = CCSRBAR + CCI400_OFFSET
+config SYS_FSL_ERRATUM_A008997
+ bool
+ help
+ Workaround for USB PHY erratum A008997
+
config SYS_FSL_ERRATUM_A009008
bool
help
#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
}
+static void erratum_a008997(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
+ u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+ clrsetbits_be32(scfg + SCFG_USB3PRM2CR / 4,
+ SCFG_USB_PCSTXSWINGFULL_MASK,
+ SCFG_USB_PCSTXSWINGFULL_VAL);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
+}
+
+
void s_init(void)
{
}
/* Erratum */
erratum_a009008();
erratum_a009798();
+ erratum_a008997();
return 0;
}
#define SCFG_USB3PRM1CR 0x070
#define SCFG_USB_TXVREFTUNE 0x9
#define SCFG_USB_SQRXTUNE_MASK 0x7
+#define SCFG_USB3PRM2CR 0x074
+#define SCFG_USB_PCSTXSWINGFULL_MASK 0x0000FE00
+#define SCFG_USB_PCSTXSWINGFULL_VAL 0x00008E00
/* Supplemental Configuration Unit */
struct ccsr_scfg {