83xx: Add eSDHC support on 8379 EMDS board

Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 156d8089a11bf9da9651504747f8a46bf4297ef0..062d762d2c3db188170bf49a50695f84849a2334 100644 (file)
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -23,6 +23,7 @@
 
 int board_early_init_f(void)
 {
+       struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
        u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
 
        /* Enable flash write */
@@ -30,6 +31,18 @@ int board_early_init_f(void)
        /* Clear all of the interrupt of BCSR */
        bcsr[0xe] = 0xff;
 
+#ifdef CONFIG_MMC
+       /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */
+       bcsr[0xc] |= 0x4c;
+
+       /* Set proper bits in SICR to allow SD signals through */
+       clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
+
+       clrsetbits_be32(&im->sysconf.sicrh, (SICRH_GPIO2_E | SICRH_SPI),
+                       (SICRH_GPIO2_E_SD | SICRH_SPI_SD));
+
+#endif
+
 #ifdef CONFIG_FSL_SERDES
        immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
        u32 spridr = in_be32(&immr->sysconf.spridr);
@@ -38,21 +51,21 @@ int board_early_init_f(void)
        switch (PARTID_NO_E(spridr)) {
        case SPR_8377:
                fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
-                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+                               FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                break;
        case SPR_8378:
                fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SGMII,
-                                FSL_SERDES_CLK_125, FSL_SERDES_VDD_1V);
+                               FSL_SERDES_CLK_125, FSL_SERDES_VDD_1V);
                break;
        case SPR_8379:
                fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
-                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+                               FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
-                                FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
+                               FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
                break;
        default:
                printf("serdes not configured: unknown CPU part number: "
-                      "%04x\n", spridr >> 16);
+                               "%04x\n", spridr >> 16);
                break;
        }
 #endif /* CONFIG_FSL_SERDES */

diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 587fca323bb587bc56d3690c6b85c6a4f43684fc..9e0a05d61516853c99ccf3233056e4f92a7c4910 100644 (file)
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -34,6 +34,7 @@
 #include <libfdt.h>
 #include <tsec.h>
 #include <netdev.h>
+#include <fsl_esdhc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -385,3 +386,16 @@ int cpu_eth_init(bd_t *bis)
 #endif
        return 0;
 }
+
+/*
+ * Initializes on-chip MMC controllers.
+ * to override, implement board_mmc_init()
+ */
+int cpu_mmc_init(bd_t *bis)
+{
+#ifdef CONFIG_FSL_ESDHC
+       return fsl_esdhc_mmc_init(bis);
+#else
+       return 0;
+#endif
+}

diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 77c09db6b891365eaefa62fc394b062f7785ab8c..7b847f80225ed25aa2ca5d566eddb1232a6597c4 100644 (file)
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -895,4 +895,6 @@ typedef struct immap {
 } immap_t;
 #endif
 
+#define CONFIG_SYS_MPC83xx_ESDHC_OFFSET        (0x2e000)
+#define CONFIG_SYS_MPC83xx_ESDHC_ADDR  (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET)
 #endif                         /* __IMMAP_83xx__ */

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 0dd6ef52f40d90eb29c6fcde069454d5ec4bc361..75b67b459074634933460ff40af1d6c3e492135a 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -319,6 +319,9 @@
 #define CONFIG_OF_BOARD_SETUP  1
 #define CONFIG_OF_STDOUT_VIA_ALIAS     1
 
+#define CONFIG_SYS_64BIT_STRTOUL               1
+#define CONFIG_SYS_64BIT_VSPRINTF              1
+
 /* I2C */
 #define CONFIG_HARD_I2C                /* I2C with hardware support */
 #undef CONFIG_SOFT_I2C         /* I2C bit-banged */
@@ -502,6 +505,18 @@ extern int board_pci_host_broken(void);
 
 #undef CONFIG_WATCHDOG         /* watchdog disabled */
 
+#define CONFIG_MMC     1
+
+#ifdef CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC83xx_ESDHC_ADDR
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
 /*
  * Miscellaneous configurable options
  */

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 191488aa89938d2454438bdd36878b717435c9e3..3554fdd4ed92abe5e6fe5300e941188b9b48c547 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -266,6 +266,7 @@
 /* SICRL bits - MPC837x specific */
 #define SICRL_USB_A                    0xC0000000
 #define SICRL_USB_B                    0x30000000
+#define SICRL_USB_B_SD                 0x20000000
 #define SICRL_UART                     0x0C000000
 #define SICRL_GPIO_A                   0x02000000
 #define SICRL_GPIO_B                   0x01000000
@@ -307,10 +308,12 @@
 #define SICRH_GPIO2_C                  0x00002000
 #define SICRH_GPIO2_D                  0x00001000
 #define SICRH_GPIO2_E                  0x00000C00
+#define SICRH_GPIO2_E_SD               0x00000800
 #define SICRH_GPIO2_F                  0x00000300
 #define SICRH_GPIO2_G                  0x000000C0
 #define SICRH_GPIO2_H                  0x00000030
 #define SICRH_SPI                      0x00000003
+#define SICRH_SPI_SD                   0x00000001
 #endif
 
 /* SWCRR - System Watchdog Control Register