Remove magic numbers from cache related operations for mpc85xx

The mpc85xx start code uses some magic numbers that we actually
have #defines for in <config.h> so use those instead.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 5d65190ede812b976d893d127f344d0c0dafee8a..e5cabcac054899535389f958669d14490f42fdcc 100644 (file)
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -266,13 +266,13 @@ _start_e500:
         */
        lis     r3,CFG_INIT_RAM_ADDR@h
        ori     r3,r3,CFG_INIT_RAM_ADDR@l
-       li      r2,512 /* 512*32=16K */
+       li      r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) 
        mtctr   r2
        li      r0,0
 1:
        dcbz    r0,r3
        dcbtls  0,r0,r3
-       addi    r3,r3,32
+       addi    r3,r3,CFG_CACHELINE_SIZE
        bdnz    1b
 
        /* Jump out the last 4K page and continue to 'normal' start */
@@ -1066,11 +1066,11 @@ unlock_ram_in_cache:
        /* invalidate the INIT_RAM section */
        lis     r3,(CFG_INIT_RAM_ADDR & ~31)@h
        ori     r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-       li      r4,512
+       li      r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) 
        mtctr   r4
 1:     icbi    r0,r3
        dcbi    r0,r3
-       addi    r3,r3,32
+       addi    r3,r3,CFG_CACHELINE_SIZE
        bdnz    1b
        sync                    /* Wait for all icbi to complete on bus */
        isync