Move CONFIG_SDHCI to Kconfig and rename it to CONFIG_MMC_SDHCI.
My motivation for the rename is, ultimately, to make all the MMC
options prefixed with MMC_ and SDHCI options with MMC_SDHCI_,
like Linux.
This commit was created as follows:
[1] Rename the config option with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e 's/CONFIG_SDHCI/CONFIG_MMC_SDHCI/g'
[2] create the entry for MMC_SDHCI in drivers/mmc/Kconfig
[3] run "tools/moveconfig.py -y MMC_SDHCI"
[4] add "depends on MMC_SDHCI" to existing SDHCI driver entries
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
#ifdef CONFIG_GENERIC_MMC
static int init_mmc(void)
{
-#ifdef CONFIG_SDHCI
+#ifdef CONFIG_MMC_SDHCI
return exynos_mmc_init(gd->fdt_blob);
#else
return 0;
CONFIG_CMD_SOUND=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_SAMSUNG=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_LED_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MSM_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_PM8916=y
CONFIG_MSM_SERIAL=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_ROCKCHIP_DWMMC=y
CONFIG_ROCKCHIP_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_RK3399_PINCTRL=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CPU=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_ADC_EXYNOS=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_REGULATOR=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_PIC32_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_ETH=y
CONFIG_PIC32_ETH=y
CONFIG_PINCTRL=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
+CONFIG_MMC_SDHCI=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
+CONFIG_MMC_SDHCI=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_I2C_GPIO=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX8998=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_SYS_I2C_AT91=y
CONFIG_DM_MMC=y
CONFIG_ATMEL_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SYS_I2C_AT91=y
CONFIG_DM_MMC=y
CONFIG_ATMEL_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM_I2C_COMPAT=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
+CONFIG_MMC_SDHCI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_ETH=y
CONFIG_ZYNQ_GEM=y
CONFIG_DEBUG_UART=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_DM_ETH=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_ZYNQ_GEM=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_SDHCI=y
+CONFIG_MMC_SDHCI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
config MSM_SDHCI
bool "Qualcomm SDHCI controller"
depends on DM_MMC && BLK && DM_MMC_OPS
+ depends on MMC_SDHCI
help
Enables support for SDHCI 2.0 controller present on some Qualcomm
Snapdragon devices. This device is compatible with eMMC v4.5 and
config ATMEL_SDHCI
bool "Atmel SDHCI controller support"
depends on DM_MMC && BLK && DM_MMC_OPS && ARCH_AT91
+ depends on MMC_SDHCI
help
This enables support for the Atmel SDHCI controller, which supports
the embedded MultiMedia Card (e.MMC) Specification V4.51, the SD
config PIC32_SDHCI
bool "Microchip PIC32 on-chip SDHCI support"
depends on DM_MMC && MACH_PIC32
+ depends on MMC_SDHCI
help
Support for Microchip PIC32 SDHCI controller.
config ZYNQ_SDHCI
bool "Arasan SDHCI controller support"
depends on DM_MMC && OF_CONTROL && BLK && DM_MMC_OPS
+ depends on MMC_SDHCI
help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
config ROCKCHIP_SDHCI
bool "Arasan SDHCI controller for Rockchip support"
depends on DM_MMC && BLK && DM_MMC_OPS
+ depends on MMC_SDHCI
help
Support for Arasan SDHCI host controller on Rockchip ARM SoCs platform
improves build coverage for sandbox and makes it easier to detect
MMC build errors with sandbox.
+config MMC_SDHCI
+ bool "Secure Digital Host Controller Interface support"
+ help
+ This selects the generic Secure Digital Host Controller Interface.
+ It is used by manufacturers such as Texas Instruments(R), Ricoh(R)
+ and Toshiba(R). Most controllers found in laptops are of this type.
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
endif
endmenu
obj-$(CONFIG_SANDBOX) += sandbox_mmc.o
endif
endif
-obj-$(CONFIG_SDHCI) += sdhci.o
+obj-$(CONFIG_MMC_SDHCI) += sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
#define CONFIG_KONA_GPIO
/* MMC/SD Driver */
-#define CONFIG_SDHCI
#define CONFIG_MMC_SDMA
#define CONFIG_KONA_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_KONA_GPIO
/* MMC/SD Driver */
-#define CONFIG_SDHCI
#define CONFIG_MMC_SDMA
#define CONFIG_KONA_SDHCI
#define CONFIG_GENERIC_MMC
*/
#define CONFIG_MMC_SDMA
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_MV_SDHCI
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
#define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
*/
#define CONFIG_MMC_SDMA
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_MV_SDHCI
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
/* This are needed to have proper mmc support */
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard410c/u-boot.lds"
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_S5P_SDHCI
-#define CONFIG_SDHCI
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOUNCE_BUFFER
#undef CONFIG_SCSI
/* SD/MMC support */
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDMA
/*-----------------------------------------------------------------------
* SDHC Configuration
*/
-#define CONFIG_SDHCI
#define CONFIG_GENERIC_MMC
/*--------------------------------------------------
/* MMC/SD IP block */
#define CONFIG_GENERIC_MMC
#define CONFIG_DWMMC
-#define CONFIG_SDHCI
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_MMC_SDHCI_IO_ACCESSORS
#define CONFIG_BCM2835_SDHCI
/* MMC */
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define SDHCI_MAX_HOSTS 4
/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
-#define CONFIG_SDHCI
#endif
/* USB device */
#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_GENERIC_MMC
# define CONFIG_SUPPORT_EMMC_BOOT
-# define CONFIG_SDHCI
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
# endif
/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_GENERIC_MMC
-# define CONFIG_SDHCI
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#endif