Support dlvision-10g hardware with displayport output.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
#define LATCH2_MC2_PRESENT_N 0x0080
enum {
- UNITTYPE_VIDEO_USER = 0,
- UNITTYPE_MAIN_USER = 1,
- UNITTYPE_VIDEO_SERVER = 2,
- UNITTYPE_MAIN_SERVER = 3,
+ UNITTYPE_MAIN = 1<<0,
+ UNITTYPE_SERVER = 1<<1,
+ UNITTYPE_DISPLAYPORT = 1<<2,
};
enum {
HWVER_101 = 0,
HWVER_110 = 1,
- HWVER_120 = 2,
- HWVER_130 = 3,
+ HWVER_130 = 2,
+ HWVER_140 = 3,
+ HWVER_150 = 4,
+ HWVER_160 = 5,
+ HWVER_170 = 6,
};
enum {
feature_carriers = (fpga_features >> 2) & 0x0003;
feature_video_channels = fpga_features & 0x0003;
- switch (unit_type) {
- case UNITTYPE_VIDEO_USER:
- printf("Videochannel Userside");
- break;
+ if (unit_type & UNITTYPE_MAIN)
+ printf("Mainchannel ");
+ else
+ printf("Videochannel ");
- case UNITTYPE_MAIN_USER:
- printf("Mainchannel Userside");
- break;
+ if (unit_type & UNITTYPE_SERVER)
+ printf("Serverside ");
+ else
+ printf("Userside ");
+
+ if (unit_type & UNITTYPE_DISPLAYPORT)
+ printf("DisplayPort");
+ else
+ printf("DVI-DL");
- case UNITTYPE_VIDEO_SERVER:
- printf("Videochannel Serverside");
+ switch (hardware_version) {
+ case HWVER_101:
+ printf(" HW-Ver 1.01\n");
break;
- case UNITTYPE_MAIN_SERVER:
- printf("Mainchannel Serverside");
+ case HWVER_110:
+ printf(" HW-Ver 1.10-1.20\n");
break;
- default:
- printf("UnitType %d(not supported)", unit_type);
+ case HWVER_130:
+ printf(" HW-Ver 1.30\n");
break;
- }
- switch (hardware_version) {
- case HWVER_101:
- printf(" HW-Ver 1.01\n");
+ case HWVER_140:
+ printf(" HW-Ver 1.40-1.43\n");
break;
- case HWVER_110:
- printf(" HW-Ver 1.10-1.12\n");
+ case HWVER_150:
+ printf(" HW-Ver 1.50\n");
break;
- case HWVER_120:
- printf(" HW-Ver 1.20\n");
+ case HWVER_160:
+ printf(" HW-Ver 1.60-1.61\n");
break;
- case HWVER_130:
- printf(" HW-Ver 1.30\n");
+ case HWVER_170:
+ printf(" HW-Ver 1.70\n");
break;
default:
if (get_mc2_present())
print_fpga_info(1);
- if (((versions >> 4) & 0x000f) != UNITTYPE_MAIN_USER)
+ if (((versions >> 4) & 0x000f) & UNITTYPE_SERVER)
return 0;
if (!get_fpga_state(0) || (get_hwver() == HWVER_101))
obj-$(CONFIG_IO) += miiphybb.o
obj-$(CONFIG_IO64) += miiphybb.o
obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o
-obj-$(CONFIG_DLVISION_10G) += osd.o
+obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
obj-$(CONFIG_CONTROLCENTERD) += dp501.o
obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o
#undef CONFIG_CMD_DHCP
#undef CONFIG_CMD_DIAG
#undef CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_I2C
+#define CONFIG_CMD_I2C
#undef CONFIG_CMD_IRQ
/*
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_IHS
+#define CONFIG_SYS_I2C_IHS_DUAL
#define CONFIG_SYS_I2C_IHS_CH0
#define CONFIG_SYS_I2C_IHS_SPEED_0 50000
#define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F
+#define CONFIG_SYS_I2C_IHS_SPEED_0_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_0_1 0x7F
#define CONFIG_SYS_I2C_IHS_CH1
#define CONFIG_SYS_I2C_IHS_SPEED_1 50000
#define CONFIG_SYS_I2C_IHS_SLAVE_1 0x7F
+#define CONFIG_SYS_I2C_IHS_SPEED_1_1 50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_1_1 0x7F
-#define CONFIG_SYS_SPD_BUS_NUM 2
+#define CONFIG_SYS_SPD_BUS_NUM 4
/* Temp sensor/hwmon/dtt */
-#define CONFIG_SYS_DTT_BUS_NUM 2
+#define CONFIG_SYS_DTT_BUS_NUM 4
#define CONFIG_DTT_LM63 1 /* National LM63 */
#define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */
#define CONFIG_DTT_PWM_LOOKUPTABLE \
{ 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } }
#define CONFIG_DTT_TACH_LIMIT 0xa10
-#define CONFIG_SYS_ICS8N3QV01_I2C {0, 1}
-#define CONFIG_SYS_SIL1178_I2C {0, 1}
+#define CONFIG_SYS_ICS8N3QV01_I2C {1, 3}
+#define CONFIG_SYS_SIL1178_I2C {0, 2}
+#define CONFIG_SYS_DP501_I2C {0, 2}
/* EBC peripherals */
*/
#define CONFIG_SYS_MPC92469AC
#define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT
+#define CONFIG_SYS_DP501_DIFFERENTIAL
+#define CONFIG_SYS_DP501_VCAPCTRL0 0x01 /* DDR mode 0, DE for H/VSYNC */
#endif /* __CONFIG_H */