}
}
-void imx_set_wdog_powerdown(bool enable)
+void imx_wdog_disable_powerdown(void)
{
struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
#endif
/* Write to the PDE (Power Down Enable) bit */
- writew(enable, &wdog1->wmcr);
- writew(enable, &wdog2->wmcr);
+ writew(0, &wdog1->wmcr);
+ writew(0, &wdog2->wmcr);
if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx7())
- writew(enable, &wdog3->wmcr);
+ writew(0, &wdog3->wmcr);
#ifdef CONFIG_MX7D
- writew(enable, &wdog4->wmcr);
+ writew(0, &wdog4->wmcr);
#endif
}
if (is_mx6sl())
setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);
- imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
+ imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */
if (is_mx6sx())
setbits_le32(&ccm->cscdr1, MXC_CCM_CSCDR1_UART_CLK_SEL);