+++ /dev/null
-/*
- * (C) Copyright 2009
- * Michael Schwingen, michael@schwingen.org
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <command.h>
-#include <malloc.h>
-#include <asm/arch/ixp425.h>
-#include <asm/io.h>
-#include <miiphy.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-#include <asm/arch/ixp425pci.h>
-#endif
-
-#include "dvlhost_hw.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- /* CS1: LED Latch */
- writel(0xBFFF0002, IXP425_EXP_CS1);
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x00000100;
-
- /* Setup GPIOs used as output */
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDGTRIGGER);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DLAN_PAIRING);
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PCIRST);
-
- /*
- * LED latch enable and watchdog enable are tied to the same GPIO,
- * so we need to trigger the watchdog if we want to enable the LEDs.
- */
-#ifdef CONFIG_HW_WATCHDOG
- GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_WDG_LED_EN);
-#else
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_WDG_LED_EN);
-#endif
-
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDGTRIGGER);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DLAN_PAIRING);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_WDG_LED_EN);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCIRST);
-
- /* Setup GPIOs for Interrupt inputs */
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_WLAN);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_PAIRING);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_BTN_RESET);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_IRQA);
- GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_IRQB);
-
- /* Setup GPIO's for 33MHz clock output */
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
- GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
- writel(0x01FF01FF, IXP425_GPIO_GPCLKR);
-
- /* turn off all LEDs */
- writew(0x0000, DVLHOST_LED_LATCH);
-
- udelay(533);
- GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_PCIRST);
-
- return 0;
-}
-
-/* Check Board Identity */
-int checkboard(void)
-{
- char *s = getenv("serial#");
-
- puts("Board: dLAN 200AV (dvlhost)");
-
- if (s != NULL) {
- puts(", serial# ");
- puts(s);
- }
- putc('\n');
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
- return 0;
-}
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-void pci_init_board(void)
-{
- pci_ixp_init(&hose);
-}
-#endif
-
-void reset_phy(void)
-{
- /* init IcPlus IP175C ethernet switch to native IP175C mode */
- miiphy_write("NPE1", 29, 31, 0x175C);
-}
+++ /dev/null
-/*
- * (C) Copyright 2009
- * Michael Schwingen, michael@schwingen.org
- *
- * Configuration settings for the
- * dLAN200 AV Wireless G ("dvlhost") board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_IXP425 1
-#define CONFIG_DVLHOST 1
-
-#define CONFIG_MACH_TYPE 1343
-
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO 1
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
-#define CONFIG_BOARD_EARLY_INIT_F 1
-#define CONFIG_SYS_LDSCRIPT "board/dvlhost/u-boot.lds"
-
-/***************************************************************
- * U-boot generic defines start here.
- ***************************************************************/
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command line configuration. */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
-#define CONFIG_PCI
-#ifdef CONFIG_PCI
-#define CONFIG_CMD_PCI
-#define CONFIG_PCI_PNP
-#define CONFIG_IXP_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_CMD_PCI_ENUM
-#endif
-
-#define CONFIG_BOOTCOMMAND "run boot_flash"
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_KGDB_BAUDRATE 230400
-#endif
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE 256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-/* max number of command args */
-#define CONFIG_SYS_MAXARGS 16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START 0x00000000
-#define CONFIG_SYS_MEMTEST_END 0x01D80000
-
-/* timer clock - 2* OSC_IN system clock */
-#define CONFIG_IXP425_TIMER_CLK 66666666
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR 0x00010000
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
- 115200, 230400 }
-#define CONFIG_SERIAL_RTS_ACTIVE 1
-
-/* Expansion bus settings */
-#define CONFIG_SYS_EXP_CS0 0xbd113442
-
-/* SDRAM settings */
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 0x00000000
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-
-/* 32MB SDRAM: 2* 8Mx16, CL3 */
-#define CONFIG_SYS_SDR_CONFIG 0x18
-#define PHYS_SDRAM_1_SIZE 0x02000000
-#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800
-#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
-#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE
-
-/* FLASH organization: one Spansion S29AL032D-04 Flash */
-#define CONFIG_SYS_TEXT_BASE 0x50000000
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-/* max number of sectors on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT 140
-#define PHYS_FLASH_1 0x50000000
-#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-#define CONFIG_BOARD_SIZE_LIMIT 262144
-
-/* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* no byte writes on IXP4xx */
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-
-/* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-/* Ethernet */
-
-/* include IXP4xx NPE support */
-#define CONFIG_IXP4XX_NPE 1
-
-/* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */
-#define CONFIG_PHY_ADDR 0x18
-/* NPE1 PHY: MII IP175 switch, port 5 is host port */
-#define CONFIG_PHY1_ADDR 0x05
-/* MII PHY management */
-#define CONFIG_MII 1
-/* fixed-speed powerline modem without standard PHY registers on MII */
-#define CONFIG_MII_NPE0_FIXEDLINK 1
-#define CONFIG_MII_NPE0_SPEED 100
-#define CONFIG_MII_NPE0_FULLDUPLEX 1
-/* fixed-speed switch without standard PHY registers on MII */
-#define CONFIG_MII_NPE1_FIXEDLINK 1
-#define CONFIG_MII_NPE1_SPEED 100
-#define CONFIG_MII_NPE1_FULLDUPLEX 1
-
-/* Number of ethernet rx buffers & descriptors */
-#define CONFIG_SYS_RX_ETH_BUFFER 16
-#define CONFIG_RESET_PHY_R 1
-/* ethernet switch connected to MII port */
-#define CONFIG_MII_ETHSWITCH 1
-#define CONFIG_HAS_ETH1 1
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#undef CONFIG_CMD_NFS
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 32
-
-/*
- * environment organization:
- * one flash sector, embedded in uboot area (bottom bootblock flash)
- */
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
-#define CONFIG_SYS_USE_PPCENV 1
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "npe_ucode=50040000\0" \
- "ethprime=NPE1\0" \
- "ethrotate=no\0" \
- "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \
- "kerneladdr=50050000\0" \
- "kernelfile=dvlhost/uImage\0" \
- "rootfile=dvlhost/rootfs\0" \
- "rootaddr=50170000\0" \
- "loadaddr=10000\0" \
- "updateboot_ser=mw.b 10000 ff 40000;" \
- " loady ${loadaddr};" \
- " run eraseboot writeboot\0" \
- "updateboot_net=mw.b 10000 ff 40000;" \
- " tftp ${loadaddr} dvlhost/u-boot.bin;" \
- " run eraseboot writeboot\0" \
- "eraseboot=protect off 50000000 50003fff;" \
- " protect off 50006000 5003ffff;" \
- " erase 50000000 50003fff;" \
- " erase 50006000 5003ffff\0" \
- "writeboot=cp.b 10000 50000000 4000;" \
- " cp.b 16000 50006000 3a000\0" \
- "updateucode=loady;" \
- " era ${npe_ucode} +${filesize};" \
- " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
- "updateroot=tftp ${loadaddr} ${rootfile};" \
- " era ${rootaddr} +${filesize};" \
- " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
- "updatekern=tftp ${loadaddr} ${kernelfile};" \
- " era ${kerneladdr} +${filesize};" \
- " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
- "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
- " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
- "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
- " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
- "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
- "boot_flash=run flashargs addtty addeth;" \
- " bootm ${kerneladdr}\0" \
- "boot_net=run netargs addtty addeth;" \
- " tftpboot ${loadaddr} ${kernelfile};" \
- " bootm\0"
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
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