Merge with git://www.denx.de/git/u-boot.git

diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 2e651df3b79df55ae3b2f3905f1b2d2e3a1c87bd..caf66909b99c7221741cb1c1f3b074f2eccd9489 100644 (file)
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -416,7 +416,7 @@ int testdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long addr;
@@ -457,7 +457,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c
index dcafac950d67bcf96ca35828f8c0e2e11131f883..ededb3e7e11c79411451c10a11bf7b2081889491 100644 (file)
--- a/board/amcc/ebony/ebony.c
+++ b/board/amcc/ebony/ebony.c
@@ -207,14 +207,14 @@ long int fixed_sdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long strap;
 
        /*--------------------------------------------------------------------------+
-     * The ebony board is always configured as the host & requires the
-     * PCI arbiter to be enabled.
+        * The ebony board is always configured as the host & requires the
+        * PCI arbiter to be enabled.
         *--------------------------------------------------------------------------*/
        strap = mfdcr(cpc0_strp1);
        if ((strap & 0x00100000) == 0) {
@@ -224,7 +224,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 286bdc1f21dd23bd8a9e5fa8615495d424cbb996..b804d55f2e7d33e11f2888de85bf642bb93e308b 100644 (file)
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -292,7 +292,7 @@ int testdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -309,7 +309,7 @@ int pci_pre_init(struct pci_controller * hose )
 
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 778aafc76607780cdcf7e00a5ab584febc6f3ab7..2eff3b33fdef4744b836fd622f66ae1c43315deb 100644 (file)
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -161,7 +161,7 @@ int testdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init( struct pci_controller *hose )
 {
        unsigned long strap;
@@ -179,7 +179,7 @@ int pci_pre_init( struct pci_controller *hose )
 
        return  1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 
 /*************************************************************************

diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index 3f6d2042d72150b39a4a157a1dcb9050f6f6a216..3bd1b81400644515502e487ae4dd8a686b2f0a9a 100644 (file)
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -306,7 +306,7 @@ long int fixed_sdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -323,7 +323,7 @@ int pci_pre_init(struct pci_controller * hose )
 
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index b49179ba0d7f9c436342cfb5c9c9d45608e30d92..b437653950388b6ae154780d969bb0f5ae8a2a05 100644 (file)
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -426,23 +426,10 @@ int testdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long addr;
-#if 0
-       /*--------------------------------------------------------------------------+
-        *      Cactus is always configured as the host & requires the
-        *      PCI arbiter to be enabled ???
-        *--------------------------------------------------------------------------*/
-       unsigned long strap;
-       mfsdr(sdr_sdstp1, strap);
-       if ((strap & SDR0_SDSTP1_PAE_MASK) == 0) {
-               printf("PCI: SDR0_STRP1[PAE] not set.\n");
-               printf("PCI: Configuration aborted.\n");
-               return 0;
-       }
-#endif
 
        /*-------------------------------------------------------------------------+
          | Set priority for all PLB3 devices to 0.
@@ -480,7 +467,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/taishan/taishan.c b/board/amcc/taishan/taishan.c
index 1a2e53b1abcc1b44975ebc31602fe14bfcce1c09..bc976c75261e18ea96fbbc0017963bac14722656 100644 (file)
--- a/board/amcc/taishan/taishan.c
+++ b/board/amcc/taishan/taishan.c
@@ -236,7 +236,7 @@ int testdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -253,7 +253,7 @@ int pci_pre_init(struct pci_controller * hose )
 
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index c2e12ba12ea85d7c40b9ba5fe22cd21b69780355..912f09ee4395b62c52f25fa12ecda59d6ecd8e00 100644 (file)
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -385,7 +385,7 @@ int testdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long addr;
@@ -426,7 +426,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 90eaab1c80befc58c2ffa5ee782df9095a4640c4..7316c34b4a7d8adc1a5de0e853579d7d464d6a38 100644 (file)
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -604,7 +604,7 @@ int testdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -621,7 +621,7 @@ int pci_pre_init(struct pci_controller * hose )
 
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
index f80361081a6c080d6011a5fa168724515f8fea3e..2ed0fc272205539fadca592c8904d2fc0fa9b93d 100644 (file)
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -23,9 +23,11 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <command.h>
 #include <malloc.h>
 #include <net.h>
+#include <pci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -179,11 +181,15 @@ int board_early_init_f (void)
        mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
        mtdcr(uicer, 0x00000000);       /* disable all ints */
        mtdcr(uiccr, 0x00000000);       /* set all to be non-critical*/
+#ifdef CONFIG_CPCI405_6U
        if (cpci405_version() == 3) {
                mtdcr(uicpr, 0xFFFFFF99);       /* set int polarities */
        } else {
                mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
        }
+#else
+       mtdcr(uicpr, 0xFFFFFF81);       /* set int polarities */
+#endif
        mtdcr(uictr, 0x10000000);       /* set int trigger levels */
        mtdcr(uicvcr, 0x00000001);      /* set vect base=0,INT0 highest priority*/
        mtdcr(uicsr, 0xFFFFFFFF);       /* clear all ints */
@@ -227,10 +233,10 @@ int cpci405_version(void)
         */
        cntrl0Reg = mfdcr(cntrl0);
        mtdcr(cntrl0, cntrl0Reg | 0x03000000);
-       out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
-       out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
+       out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x00180000);
+       out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x00180000);
        udelay(1000);                   /* wait some time before reading input */
-       value = in32(GPIO0_IR) & 0x00180000;       /* get config bits */
+       value = in_be32((void*)GPIO0_IR) & 0x00180000;       /* get config bits */
 
        /*
         * Restore GPIO settings
@@ -245,7 +251,7 @@ int cpci405_version(void)
                /* CS2==0 && CS3==1 -> version 2 */
                return 2;
        case 0x00100000:
-               /* CS2==1 && CS3==0 -> version 3 */
+               /* CS2==1 && CS3==0 -> version 3 or 6U board */
                return 3;
        case 0x00000000:
                /* CS2==0 && CS3==0 -> version 4 */
@@ -283,7 +289,6 @@ int misc_init_r (void)
         * On CPCI-405 version 2 the environment is saved in eeprom!
         * FPGA can be gzip compressed (malloc) and booted this late.
         */
-
        if (cpci405_version() >= 2) {
                /*
                 * Setup GPIO pins (CS6+CS7 as GPIO)
@@ -354,6 +359,7 @@ int misc_init_r (void)
                SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
                udelay(1000); /* wait 1ms */
 
+#ifdef CONFIG_CPCI405_6U
                if (cpci405_version() == 3) {
                        volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR;
                        volatile unsigned char *leds = (unsigned char *)CFG_LED_ADDR;
@@ -375,6 +381,7 @@ int misc_init_r (void)
                        udelay(100);
                        *fpga_mode &= ~(CFG_FPGA_MODE_DUART_RESET);
                }
+#endif
        }
        else {
                puts("\n*** U-Boot Version does not match Board Version!\n");
@@ -493,12 +500,6 @@ int checkboard (void)
 #endif
 
        putc ('\n');
-
-       /*
-        * Disable sleep mode in LXT971
-        */
-       lxt971_no_sleep();
-
        return 0;
 }
 
@@ -511,24 +512,22 @@ long int initdram (int board_type)
        mtdcr(memcfga, mem_mb0cf);
        val = mfdcr(memcfgd);
 
-#if 0
-       printf("\nmb0cf=%x\n", val); /* test-only */
-       printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
        return (4*1024*1024 << ((val & 0x000e0000) >> 17));
 }
 
-/* ------------------------------------------------------------------------- */
 
-int testdram (void)
+void reset_phy(void)
 {
-       /* TODO: XXX XXX XXX */
-       printf ("test: 16 MB - ok\n");
+#ifdef CONFIG_LXT971_NO_SLEEP
 
-       return (0);
+       /*
+        * Disable sleep mode in LXT971
+        */
+       lxt971_no_sleep();
+#endif
 }
 
+
 /* ------------------------------------------------------------------------- */
 
 #ifdef CONFIG_CPCI405_VER2
@@ -552,6 +551,41 @@ void ide_set_reset(int on)
 #endif /* CONFIG_CPCI405_VER2 */
 
 
+#if defined(CONFIG_PCI)
+void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+       unsigned char int_line = 0xff;
+
+       /*
+        * Write pci interrupt line register (cpci405 specific)
+        */
+       switch (PCI_DEV(dev) & 0x03) {
+       case 0:
+               int_line = 27 + 2;
+               break;
+       case 1:
+               int_line = 27 + 3;
+               break;
+       case 2:
+               int_line = 27 + 0;
+               break;
+       case 3:
+               int_line = 27 + 1;
+               break;
+       }
+
+       pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
+}
+
+int pci_pre_init(struct pci_controller *hose)
+{
+       hose->fixup_irq = cpci405_pci_fixup_irq;
+       return 1;
+}
+#endif /* defined(CONFIG_PCI) */
+
+
+
 #ifdef CONFIG_CPCI405AB
 
 #define ONE_WIRE_CLEAR   (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \

diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index b303ec7cb3c6be0c7e4e1de33605e9dabc7b8a15..d5b8f8c81baebe0602ad2da08815e3521ef31de3 100644 (file)
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -304,7 +304,7 @@ int testdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long addr;
@@ -345,7 +345,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c
index 8858f0a5e542d5a7d7bd1c33bfc7954e5ceac950..b73ab2adecce4cf93dcd0648dd68fbdee967da07 100644 (file)
--- a/board/pcs440ep/pcs440ep.c
+++ b/board/pcs440ep/pcs440ep.c
@@ -217,7 +217,7 @@ int testdram(void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long addr;
@@ -258,7 +258,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/prodrive/alpr/alpr.c b/board/prodrive/alpr/alpr.c
index 5abc87dde64b7c3e50ae01b876b15b6e403474df..b76449989bc58238786b2c04bdbe1c859c19547d 100644 (file)
--- a/board/prodrive/alpr/alpr.c
+++ b/board/prodrive/alpr/alpr.c
@@ -172,7 +172,7 @@ int testdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -192,7 +192,7 @@ int pci_pre_init(struct pci_controller * hose )
 
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c
index 2f28e9d87a3477f3f8b9b2d716b4a575dff8da42..1a8aacbdf12dbddf1cdf772c49b5c9c21ef24c0d 100644 (file)
--- a/board/prodrive/p3p440/p3p440.c
+++ b/board/prodrive/p3p440/p3p440.c
@@ -176,7 +176,7 @@ int misc_init_r (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller *hose)
 {
        unsigned long strap;
@@ -193,7 +193,7 @@ int pci_pre_init(struct pci_controller *hose)
 
        return 1;
 }
-#endif                         /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c
index 781647251683d574e6f4b17c1692c76e03eacea1..8a831fa35f167cb0eb58a9c6ecca13c00fc2fc58 100644 (file)
--- a/board/sandburst/common/sb_common.c
+++ b/board/sandburst/common/sb_common.c
@@ -313,7 +313,7 @@ long int fixed_sdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -330,7 +330,7 @@ int pci_pre_init(struct pci_controller * hose )
 
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index a569b534727a87a7e2eb055962061cc1530f5540..8411cf06f761816a15d3fd04157e190341cc2ddb 100644 (file)
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -209,7 +209,7 @@ long int fixed_sdram (void)
  *     certain pre-initialization actions.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
 int pci_pre_init(struct pci_controller * hose )
 {
        unsigned long strap;
@@ -227,7 +227,7 @@ int pci_pre_init(struct pci_controller * hose )
 #endif
        return 1;
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
 
 /*************************************************************************
  *  pci_target_init

diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index 8bf03e1b2f18cc2bb10a18d50cf0d0ef31f23a46..28379298b72a9f7a19be590b8c26fe9ae08ba0c4 100644 (file)
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -77,11 +77,21 @@
 #include <asm/processor.h>
 #include <pci.h>
 
+#ifdef CONFIG_PCI
+
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+/*
+ * Board-specific pci initialization
+ * Platform code can reimplement pci_pre_init() if needed
+ */
+int __pci_pre_init(struct pci_controller *hose)
+{
+       return 1;
+}
+int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init")));
 
-#ifdef CONFIG_PCI
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
 
 #if defined(CONFIG_PMC405)
 ushort pmc405_pci_subsys_deviceid(void);
@@ -191,6 +201,13 @@ void pci_405gp_init(struct pci_controller *hose)
        if (hose->pci_fb)
                pciauto_region_init(hose->pci_fb);
 
+       /* Let board change/modify hose & do initial checks */
+       if (pci_pre_init (hose) == 0) {
+               printf("PCI: Board-specific initialization failed.\n");
+               printf("PCI: Configuration aborted.\n");
+               return;
+       }
+
        pci_register_hose(hose);
 
        /*--------------------------------------------------------------------------+
@@ -416,14 +433,12 @@ void pci_init_board(void)
 
 #endif
 
-#endif /* CONFIG_PCI */
-
 #endif /* CONFIG_405GP */
 
 /*-----------------------------------------------------------------------------+
  * CONFIG_440
  *-----------------------------------------------------------------------------*/
-#if defined(CONFIG_440) && defined(CONFIG_PCI)
+#if defined(CONFIG_440)
 
 static struct pci_controller ppc440_hose = {0};
 
@@ -496,14 +511,12 @@ void pci_440_init (struct pci_controller *hose)
 
        pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
 
-#if defined(CFG_PCI_PRE_INIT)
        /* Let board change/modify hose & do initial checks */
        if (pci_pre_init (hose) == 0) {
                printf("PCI: Board-specific initialization failed.\n");
                printf("PCI: Configuration aborted.\n");
                return;
        }
-#endif
 
        pci_register_hose( hose );
 
@@ -575,4 +588,5 @@ void pci_init_board(void)
 #endif
 }
 
-#endif /* CONFIG_440 & CONFIG_PCI */
+#endif /* CONFIG_440 */
+#endif /* CONFIG_PCI */

diff --git a/cpu/ppc4xx/config.mk b/cpu/ppc4xx/config.mk
index e7fc3f636e61d5f6be654e72a21c50ab1af20f2a..4fd510899c59c1c42143804612f8bbf875d89926 100644 (file)
--- a/cpu/ppc4xx/config.mk
+++ b/cpu/ppc4xx/config.mk
@@ -24,7 +24,7 @@
 PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing
 PLATFORM_CPPFLAGS += -DCONFIG_4xx -ffixed-r2 -ffixed-r29 -mstring -msoft-float
 
-cfg=$(shell grep configs $(TOPDIR)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
+cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
 is440=$(shell grep CONFIG_440 $(TOPDIR)/include/$(cfg))
 
 ifneq (,$(findstring CONFIG_440,$(is440)))

diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c
index 6c916eff5bd52e8767309f81574821ef6d7a9995..049a78549505272e37f6de874d15752c12331527 100644 (file)
--- a/cpu/ppc4xx/tlb.c
+++ b/cpu/ppc4xx/tlb.c
@@ -101,6 +101,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_256MB, tlb_i)) == 0) {
                                mem_size -= TLB_256MB_SIZE;
                                phys_addr += TLB_256MB_SIZE;
+                               virt_addr += TLB_256MB_SIZE;
                        }
                } else if (((phys_addr & TLB_16MB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_16MB_SIZE)) {
@@ -109,6 +110,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_16MB, tlb_i)) == 0) {
                                mem_size -= TLB_16MB_SIZE;
                                phys_addr += TLB_16MB_SIZE;
+                               virt_addr += TLB_16MB_SIZE;
                        }
                } else if (((phys_addr & TLB_1MB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_1MB_SIZE)) {
@@ -117,6 +119,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_1MB, tlb_i)) == 0) {
                                mem_size -= TLB_1MB_SIZE;
                                phys_addr += TLB_1MB_SIZE;
+                               virt_addr += TLB_1MB_SIZE;
                        }
                } else if (((phys_addr & TLB_256KB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_256KB_SIZE)) {
@@ -125,6 +128,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_256KB, tlb_i)) == 0) {
                                mem_size -= TLB_256KB_SIZE;
                                phys_addr += TLB_256KB_SIZE;
+                               virt_addr += TLB_256KB_SIZE;
                        }
                } else if (((phys_addr & TLB_64KB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_64KB_SIZE)) {
@@ -133,6 +137,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_64KB, tlb_i)) == 0) {
                                mem_size -= TLB_64KB_SIZE;
                                phys_addr += TLB_64KB_SIZE;
+                               virt_addr += TLB_64KB_SIZE;
                        }
                } else if (((phys_addr & TLB_16KB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_16KB_SIZE)) {
@@ -141,6 +146,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_16KB, tlb_i)) == 0) {
                                mem_size -= TLB_16KB_SIZE;
                                phys_addr += TLB_16KB_SIZE;
+                               virt_addr += TLB_16KB_SIZE;
                        }
                } else if (((phys_addr & TLB_4KB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_4KB_SIZE)) {
@@ -149,6 +155,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_4KB, tlb_i)) == 0) {
                                mem_size -= TLB_4KB_SIZE;
                                phys_addr += TLB_4KB_SIZE;
+                               virt_addr += TLB_4KB_SIZE;
                        }
                } else if (((phys_addr & TLB_1KB_ALIGN_MASK) == phys_addr) &&
                           (mem_size >= TLB_1KB_SIZE)) {
@@ -157,6 +164,7 @@ static void program_tlb_addr(unsigned long phys_addr,
                                                TLB_WORD0_SIZE_1KB, tlb_i)) == 0) {
                                mem_size -= TLB_1KB_SIZE;
                                phys_addr += TLB_1KB_SIZE;
+                               virt_addr += TLB_1KB_SIZE;
                        }
                } else {
                        printf("ERROR: no TLB size exists for the base address 0x%0X.\n",

diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c
old mode 100644 (file)
new mode 100755 (executable)
index 7c44a29..eb9420e
--- a/cpu/ppc4xx/traps.c
+++ b/cpu/ppc4xx/traps.c
@@ -145,6 +145,9 @@ void
 MachineCheckException(struct pt_regs *regs)
 {
        unsigned long fixup, val;
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+       u32 value2;
+#endif
 
        /* Probing PCI using config cycles cause this exception
         * when a device is not present.  Catch it and return to
@@ -203,7 +206,89 @@ MachineCheckException(struct pt_regs *regs)
                /* Clear MCSR */
                mtspr(SPRN_MCSR, val);
        }
-#endif
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+       mfsdram(DDR0_00, val) ;
+       printf("DDR0: DDR0_00 %p\n", val);
+       val = (val >> 16) & 0xff;
+       if (val & 0x80)
+               printf("DDR0: At least one interrupt active\n");
+       if (val & 0x40)
+               printf("DDR0: DRAM initialization complete.\n");
+       if (val & 0x20)
+               printf("DDR0: Multiple uncorrectable ECC events.\n");
+       if (val & 0x10)
+               printf("DDR0: Single uncorrectable ECC event.\n");
+       if (val & 0x08)
+               printf("DDR0: Multiple correctable ECC events.\n");
+       if (val & 0x04)
+               printf("DDR0: Single correctable ECC event.\n");
+       if (val & 0x02)
+               printf("Multiple accesses outside the defined"
+                      " physical memory space detected\n");
+       if (val & 0x01)
+               printf("DDR0: Single access outside the defined"
+                      " physical memory space detected.\n");
+
+       mfsdram(DDR0_01, val);
+       val = (val >> 8) & 0x7;
+       switch (val ) {
+       case 0:
+               printf("DDR0: Write Out-of-Range command\n");
+               break;
+       case 1:
+               printf("DDR0: Read Out-of-Range command\n");
+               break;
+       case 2:
+               printf("DDR0: Masked write Out-of-Range command\n");
+               break;
+       case 4:
+               printf("DDR0: Wrap write Out-of-Range command\n");
+               break;
+       case 5:
+               printf("DDR0: Wrap read Out-of-Range command\n");
+               break;
+       default:
+               mfsdram(DDR0_01, value2);
+               printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2);
+       }
+       mfsdram(DDR0_23, val);
+       if ( (val >> 16) & 0xff)
+               printf("DDR0: Syndrome for correctable ECC event 0x%x\n",
+                      (val >> 16) & 0xff);
+       mfsdram(DDR0_23, val);
+       if ( (val >> 8) & 0xff)
+               printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n",
+                      (val >> 8) & 0xff);
+       mfsdram(DDR0_33, val);
+       if (val)
+               printf("DDR0: Address of command that caused an "
+                      "Out-of-Range interrupt %p\n", val);
+       mfsdram(DDR0_34, val);
+       if (val)
+               printf("DDR0: Address of uncorrectable ECC event %p\n", val);
+       mfsdram(DDR0_35, val);
+       if (val)
+               printf("DDR0: Address of uncorrectable ECC event %p\n", val);
+       mfsdram(DDR0_36, val);
+       if (val)
+               printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
+       mfsdram(DDR0_37, val);
+       if (val)
+               printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
+       mfsdram(DDR0_38, val);
+       if (val)
+               printf("DDR0: Address of correctable ECC event %p\n", val);
+       mfsdram(DDR0_39, val);
+       if (val)
+               printf("DDR0: Address of correctable ECC event %p\n", val);
+       mfsdram(DDR0_40, val);
+       if (val)
+               printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
+       mfsdram(DDR0_41, val);
+       if (val)
+               printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
+#endif /* CONFIG_440EPX */
+#endif /* CONFIG_440 */
        show_regs(regs);
        print_backtrace((unsigned long *)regs->gpr[1]);
        panic("machine check");

diff --git a/doc/README.ppc440 b/doc/README.ppc440
index 08f34f589faf08b63934c5463433c2bea2246791..2e04abacc8c287a702ffd7898999ff3866fea232 100644 (file)
--- a/doc/README.ppc440
+++ b/doc/README.ppc440
@@ -146,12 +146,13 @@ that maps in a single PCI I/O space and PCI memory space. The I/O
 space begins at PCI I/O address 0 and the PCI memory space is
 256 MB starting at PCI address CFG_PCI_TARGBASE. After the
 pci_controller structure is initialized, the cpu-specific code will
-call the routine pci_pre_init() if the CFG_PCI_PRE_INIT flag is
-defined. This routine is implemented by board-specific code & is where
-the board can over-ride/extend the default pci_controller structure
-settings and do other pre-initialization tasks. If pci_pre_init()
-returns a value of zero, PCI initialization is aborted; otherwise the
-controller structure is registered and initialization continues.
+call the routine pci_pre_init(). This routine is implemented by
+board-specific code & is where the board can over-ride/extend the
+default pci_controller structure settings and exspecially provide
+a routine to map the PCI interrupts and do other pre-initialization
+tasks. If pci_pre_init() returns a value of zero, PCI initialization
+is aborted; otherwise the controller structure is registered and
+initialization continues.
 
 The default 440GP PCI target configuration is minimal -- it assumes that
 the strapping registers are set as necessary. Since the strapping bits

diff --git a/include/common.h b/include/common.h
index 3c4b37b0dcbb11ab5c1321e05c5d6e6e9bfcb006..d8b6b469e5f6cd57e2b5c40f7368730be2941ef8 100644 (file)
--- a/include/common.h
+++ b/include/common.h
@@ -38,7 +38,7 @@ typedef volatile unsigned char        vu_char;
 #include <linux/string.h>
 #include <asm/ptrace.h>
 #include <stdarg.h>
-#if defined(CONFIG_PCI) && defined(CONFIG_440)
+#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
 #include <pci.h>
 #endif
 #if defined(CONFIG_8xx)
@@ -248,10 +248,11 @@ void      pci_init      (void);
 void   pci_init_board(void);
 void   pciinfo       (int, int);
 
-#if defined(CONFIG_PCI) && defined(CONFIG_440)
-#   if defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
     int           pci_pre_init        (struct pci_controller * );
-#   endif
+#endif
+
+#if defined(CONFIG_PCI) && defined(CONFIG_440)
 #   if defined(CFG_PCI_TARGET_INIT)
        void    pci_target_init      (struct pci_controller *);
 #   endif

diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 047e2f1eef9cc57f7a5ba6517de8cf828d2f358b..9acde1e6f03b6a1a334099afef97d5885638ebb4 100644 (file)
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -55,6 +55,10 @@
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI       1
+#undef  CONFIG_HAS_ETH1
 
 #define CONFIG_BOOTP_MASK      (CONFIG_BOOTP_DEFAULT | \
                                 CONFIG_BOOTP_DNS | \

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index d756f447f7faed06880c80c343de219f93b836de..3fc99c50244820adf460c922d33bbc510a89783c 100644 (file)
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -37,6 +37,7 @@
 #define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_CPCI405         1       /* ...on a CPCI405 board        */
 #define CONFIG_CPCI405_VER2    1       /* ...version 2                 */
+#undef  CONFIG_CPCI405_6U               /* enable this for 6U boards    */
 
 #define CONFIG_BOARD_EARLY_INIT_F 1    /* call board_early_init_f()    */
 
@@ -56,6 +57,10 @@
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI       1
+#undef  CONFIG_HAS_ETH1
 
 #define CONFIG_RTC_M48T35A     1               /* ST Electronics M48 timekeeper */
 

diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index 852d94a410ac8a45de3b0a8daaf110fa0de9559d..4e2e1a834d890bbc1366ebaf878ad376cb0b5043 100644 (file)
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -57,6 +57,10 @@
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI       1
+#undef  CONFIG_HAS_ETH1
 
 #define CONFIG_RTC_M48T35A     1               /* ST Electronics M48 timekeeper */
 

diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 2260327c3f855ba88a3429695bae0b7c875abe20..ab302df7437ddbaec80fba3e62881f8929134896 100644 (file)
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -56,6 +56,10 @@
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI       1
+#undef  CONFIG_HAS_ETH1
 
 #define CONFIG_RTC_M48T35A     1               /* ST Electronics M48 timekeeper */
 

diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index fd9bd316273741d81f4232ace4e2392e12dab455..48b94ee45ecb6fbdef2e708ade94d29cf32b8d90 100644 (file)
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -263,7 +263,6 @@
 #define CFG_PCI_TARGBASE      (CFG_PCI_MEMBASE)
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                    /* enable board pci_pre_init*/
 #define CFG_PCI_TARGET_INIT                 /* let board init pci target*/
 
 #define CFG_PCI_SUBSYS_VENDORID 0x17BA      /* Sandburst */

diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index 148fe9a5c32ad5841e1d68e79b524ffb3b52675d..7aae2bd1437340648925d66bb6defcb8ffa40dc8 100644 (file)
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -332,7 +332,6 @@
 #define CFG_PCI_TARGBASE      (CFG_PCI_MEMBASE)
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                    /* enable board pci_pre_init*/
 #define CFG_PCI_TARGET_INIT                 /* let board init pci target*/
 
 #define CFG_PCI_SUBSYS_VENDORID 0x17BA      /* Sandburst */

diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 9b32514867ab2d288207743ed9e447f1e1f7c40e..f2ad097db291f1709c8cc3df92b3e09598882b95 100644 (file)
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -238,7 +238,6 @@ extern void out32(unsigned int, unsigned long);
 #define CFG_PCI_TARGBASE    0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT                /* let board init pci target    */
 
 #define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */

diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 3e571db0e139e66c746daed6c9de72f80b0ceddb..df057d9c953e0a7aa6fcaa4bf4133f0ba3876358 100644 (file)
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -275,7 +275,6 @@
 #define CONFIG_PCI_BOOTDELAY   1       /* enable pci bootdelay variable*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT            /* let board init pci target    */
 #define CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index cd5844363f88ce075e6cb72f7e60aea96f1b593e..d58344d71773a120b451ef86aaee9e243b3bcf50 100644 (file)
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -389,7 +389,6 @@
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index 09efe1d4004ba856c1be21b58f0f549b3c469af2..4a1385ccb92cc93493857387cfe676fc1681fdef 100644 (file)
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -270,7 +270,6 @@
 #define CFG_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CFG_PCI_MEMBASE */
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT                /* let board init pci target    */
 
 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */

diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index cc47a168ed368e383741c7782f44c5b38604881d..a7eda0773bc33680348763a29d4dc7030fd333c8 100644 (file)
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -314,7 +314,6 @@
 #undef CONFIG_PCI_CONFIG_HOST_BRIDGE
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT       1       /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT            /* let board init pci target    */
 #undef CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/luan.h b/include/configs/luan.h
index 045a144aad8cd24263b2ae62c9cf101d2b81a149..cbb59c50eaf3a8c605f51910b8dcd12f8653df36 100644 (file)
--- a/include/configs/luan.h
+++ b/include/configs/luan.h
@@ -273,7 +273,6 @@
 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #undef  CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index ab42b59626863358d99f5fd24f4756e696a640a2..c6f67fee44e7d5dc4dec155cb0a6adbd4c2b7b41 100644 (file)
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -288,7 +288,6 @@
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h
index 931fb820d1c702cd5cad7cd52e9f3a0d51fff7e1..68e8cec251cb23b0ac247526e08654fb12c9b6a0 100644 (file)
--- a/include/configs/ocotea.h
+++ b/include/configs/ocotea.h
@@ -294,7 +294,6 @@
 #define CFG_PCI_TARGBASE    0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT            /* let board init pci target    */
 
 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */

diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index f67c5135489950018bf27c6ab38543e8e7a6201d..22f9f84ec23c151837df249e0297b9c5903ec26e 100644 (file)
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -227,7 +227,6 @@
 #define CFG_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CFG_PCI_MEMBASE */
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT                /* let board init pci target    */
 
 #define CONFIG_DISABLE_PISE_TEST       /* disable PISE test (PCIX only)*/

diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 333b4a2b7fdab05a2f4844e84ba0dac2d7d45613..751b51277cefb885a768ceca2726842f39e32b96 100644 (file)
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -267,7 +267,6 @@
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 7b7fb9eb415a143fc3e1b2c4143b1929db2d092d..44bc955519485c35a6ede2997a5639593544c6c6 100644 (file)
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -384,7 +384,6 @@
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/taishan.h b/include/configs/taishan.h
index b45c51dc9215378af187f51a5f7c5edb805fb76f..d756be7165fd9b6513a3adc454bc77f7076eb02a 100644 (file)
--- a/include/configs/taishan.h
+++ b/include/configs/taishan.h
@@ -298,7 +298,6 @@
 #define CFG_PCI_TARGBASE    0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT               /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT            /* let board init pci target    */
 
 #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */

diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index b036d444d138fd8b6b894a8616ecf0b8b6b3cfc3..3b106efdf51074236baa7a441ed6d08014144adf 100644 (file)
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -312,7 +312,6 @@
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 

diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 7f8b0228aec2135be2f660d60f93d8e91bceaa69..1fdcc4b505238ce24e6ff3def0b0cba87eb82a65 100644 (file)
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -289,7 +289,6 @@
 #undef CONFIG_PCI_CONFIG_HOST_BRIDGE
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT       1       /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT            /* let board init pci target    */
 #undef CFG_PCI_MASTER_INIT