]> git.sur5r.net Git - u-boot/commitdiff
arm: dts: imx7: add basic i.MX 7/Colibri iMX7 device tree
authorStefan Agner <stefan.agner@toradex.com>
Wed, 5 Oct 2016 22:27:06 +0000 (15:27 -0700)
committerStefano Babic <sbabic@denx.de>
Fri, 7 Oct 2016 10:26:15 +0000 (12:26 +0200)
Add base device for NXP i.MX 7Solo/7Dual. The two SoC are very
similar and hence can share the same device tree for boot loaders
purpose.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/Makefile
arch/arm/dts/imx7-colibri.dts [new file with mode: 0644]
arch/arm/dts/imx7.dtsi [new file with mode: 0644]

index efdd1ffaa558bab20a7d4fb62395d4f1bcf87f79..532527dd94f63001698bec6565954014a552eb7e 100644 (file)
@@ -283,6 +283,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
 
 dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb
 
+dtb-$(CONFIG_MX7) += imx7-colibri.dtb
+
 dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
        k2l-evm.dtb \
        k2e-evm.dtb \
diff --git a/arch/arm/dts/imx7-colibri.dts b/arch/arm/dts/imx7-colibri.dts
new file mode 100644 (file)
index 0000000..f2da096
--- /dev/null
@@ -0,0 +1,92 @@
+/*
+ * Copyright 2016 Toradex AG
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include "imx7.dtsi"
+
+/ {
+       model = "Toradex Colibri iMX7S/D";
+       compatible = "toradex,imx7-colibri", "fsl,imx7";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+};
+
+&i2c1 {
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+       scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&i2c4 {
+       pinctrl-names = "default", "gpio";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
+       scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
+       uart-has-rtscts;
+       fsl,dte-mode;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_i2c4: i2c4-grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA      0x4000007f
+                       MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL      0x4000007f
+               >;
+       };
+
+       pinctrl_i2c4_gpio: i2c4-gpio-grp {
+                       fsl,pins = <
+                       MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9     0x4000007f
+                       MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8     0x4000007f
+               >;
+       };
+
+       pinctrl_uart1: uart1-grp {
+               fsl,pins = <
+                       MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX    0x79
+                       MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX    0x79
+                       MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS    0x79
+                       MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS    0x79
+               >;
+       };
+
+       pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
+               fsl,pins = <
+                       MX7D_PAD_SD2_DATA1__GPIO5_IO15          0x14 /* DCD */
+                       MX7D_PAD_SD2_DATA0__GPIO5_IO14          0x14 /* DTR */
+               >;
+       };
+};
+
+&iomuxc_lpsr {
+       pinctrl_i2c1: i2c1-grp {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO05__I2C1_SDA   0x4000007f
+                       MX7D_PAD_GPIO1_IO04__I2C1_SCL   0x4000007f
+               >;
+       };
+
+       pinctrl_i2c1_gpio: i2c1-gpio-grp {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO05__GPIO1_IO5  0x4000007f
+                       MX7D_PAD_GPIO1_IO04__GPIO1_IO4  0x4000007f
+               >;
+       };
+};
diff --git a/arch/arm/dts/imx7.dtsi b/arch/arm/dts/imx7.dtsi
new file mode 100644 (file)
index 0000000..755cc46
--- /dev/null
@@ -0,0 +1,194 @@
+/*
+ * Copyright 2016 Toradex AG
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ or X11
+ */
+#include "imx7d-pinfunc.h"
+#include "skeleton.dtsi"
+
+/ {
+       aliases {
+               gpio0 = &gpio1;
+               gpio1 = &gpio2;
+               gpio2 = &gpio3;
+               gpio3 = &gpio4;
+               gpio4 = &gpio5;
+               gpio5 = &gpio6;
+               gpio6 = &gpio7;
+               i2c0 = &i2c1;
+               i2c1 = &i2c2;
+               i2c2 = &i2c3;
+               i2c3 = &i2c4;
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
+               serial3 = &uart4;
+               serial4 = &uart5;
+               serial5 = &uart6;
+               serial6 = &uart7;
+       };
+
+       soc {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "simple-bus";
+               ranges;
+
+               aips1: aips-bus@30000000 {
+                       compatible = "fsl,aips-bus", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0x30000000 0x400000>;
+                       ranges;
+
+                       gpio1: gpio@30200000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30200000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       gpio2: gpio@30210000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30210000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       gpio3: gpio@30220000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30220000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       gpio4: gpio@30230000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30230000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       gpio5: gpio@30240000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30240000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       gpio6: gpio@30250000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30250000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       gpio7: gpio@30260000 {
+                               compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
+                               reg = <0x30260000 0x10000>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
+
+                       iomuxc_lpsr: iomuxc-lpsr@302c0000 {
+                               compatible = "fsl,imx7d-iomuxc-lpsr";
+                               reg = <0x302c0000 0x10000>;
+                               fsl,input-sel = <&iomuxc>;
+                       };
+
+                       iomuxc: iomuxc@30330000 {
+                               compatible = "fsl,imx7d-iomuxc";
+                               reg = <0x30330000 0x10000>;
+                       };
+               };
+
+               aips3: aips-bus@30800000 {
+                       compatible = "fsl,aips-bus", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0x30800000 0x400000>;
+                       ranges;
+
+                       uart1: serial@30860000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30860000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       uart2: serial@30890000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30890000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       uart3: serial@30880000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30880000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       i2c1: i2c@30a20000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
+                               reg = <0x30a20000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       i2c2: i2c@30a30000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
+                               reg = <0x30a30000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       i2c3: i2c@30a40000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
+                               reg = <0x30a40000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       i2c4: i2c@30a50000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
+                               reg = <0x30a50000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       uart4: serial@30a60000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30a60000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       uart5: serial@30a70000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30a70000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       uart6: serial@30a80000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30a80000 0x10000>;
+                               status = "disabled";
+                       };
+
+                       uart7: serial@30a90000 {
+                               compatible = "fsl,imx7d-uart",
+                                            "fsl,imx6q-uart";
+                               reg = <0x30a90000 0x10000>;
+                               status = "disabled";
+                       };
+               };
+       };
+};