]> git.sur5r.net Git - u-boot/commitdiff
video: stm32: stm32_ltdc: set the blending factor
authoryannick fertre <yannick.fertre@st.com>
Fri, 2 Mar 2018 14:59:25 +0000 (15:59 +0100)
committerAnatolij Gustschin <agust@denx.de>
Mon, 19 Mar 2018 09:52:30 +0000 (10:52 +0100)
Set the blending factor regarding the pixel format

Signed-off-by: yannick fertre <yannick.fertre@st.com>
drivers/video/stm32/stm32_ltdc.c

index 6c3557b06f2cbb52765c5bba75f2835648da1613..e160c77e075cdeca6e2addcfcfcd2a2687bc1711 100644 (file)
@@ -138,7 +138,9 @@ struct stm32_ltdc_priv {
 #define LXCFBLNR_CFBLN GENMASK(10, 0)  /* Color Frame Buffer Line Number */
 
 #define BF1_PAXCA      0x600           /* Pixel Alpha x Constant Alpha */
+#define BF1_CA         0x400           /* Constant Alpha */
 #define BF2_1PAXCA     0x007           /* 1 - (Pixel Alpha x Constant Alpha) */
+#define BF2_1CA                0x005           /* 1 - Constant Alpha */
 
 enum stm32_ltdc_pix_fmt {
        PF_ARGB8888 = 0,
@@ -161,11 +163,17 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp)
                pf = PF_RGB565;
                break;
 
+       case VIDEO_BPP32:
+               pf = PF_ARGB8888;
+               break;
+
+       case VIDEO_BPP8:
+               pf = PF_L8;
+               break;
+
        case VIDEO_BPP1:
        case VIDEO_BPP2:
        case VIDEO_BPP4:
-       case VIDEO_BPP8:
-       case VIDEO_BPP32:
        default:
                debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
                      __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
@@ -178,6 +186,23 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp)
        return (u32)pf;
 }
 
+static bool has_alpha(u32 fmt)
+{
+       switch (fmt) {
+       case PF_ARGB8888:
+       case PF_ARGB1555:
+       case PF_ARGB4444:
+       case PF_AL44:
+       case PF_AL88:
+               return true;
+       case PF_RGB888:
+       case PF_RGB565:
+       case PF_L8:
+       default:
+               return false;
+       }
+}
+
 static void stm32_ltdc_enable(struct stm32_ltdc_priv *priv)
 {
        /* Reload configuration immediately & enable LTDC */
@@ -247,6 +272,7 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr)
        u32 line_length;
        u32 bus_width;
        u32 val, tmp, bpp;
+       u32 format;
 
        x0 = priv->crop_x;
        x1 = priv->crop_x + priv->crop_w - 1;
@@ -277,15 +303,18 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr)
        clrsetbits_le32(regs + LTDC_L1CFBLR, LXCFBLR_CFBLL | LXCFBLR_CFBP, val);
 
        /* Pixel format */
-       val = stm32_ltdc_get_pixel_format(priv->l2bpp);
-       clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, val);
+       format = stm32_ltdc_get_pixel_format(priv->l2bpp);
+       clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, format);
 
        /* Constant alpha value */
        clrsetbits_le32(regs + LTDC_L1CACR, LXCACR_CONSTA, priv->alpha);
 
+       /* Specifies the blending factors : with or without pixel alpha */
+       /* Manage hw-specific capabilities */
+       val = has_alpha(format) ? BF1_PAXCA | BF2_1PAXCA : BF1_CA | BF2_1CA;
+
        /* Blending factors */
-       clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1,
-                       BF1_PAXCA | BF2_1PAXCA);
+       clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, val);
 
        /* Frame buffer line number */
        clrsetbits_le32(regs + LTDC_L1CFBLNR, LXCFBLNR_CFBLN, priv->crop_h);