sdhci1 = "/sdhci@700b0400";
                spi0 = "/spi@7000d400";
                spi1 = "/spi@7000da00";
-               usb0 = "/usb@7d008000";
+               usb0 = "/usb@7d000000";
+               usb1 = "/usb@7d008000";
        };
 
        memory {
                bus-width = <8>;
        };
 
+       usb@7d000000 {
+               status = "okay";
+               dr_mode = "otg";
+               nvidia,vbus-gpio = <&gpio 108 0>; /* gpio PN4, USB_VBUS_EN0 */
+       };
+
        usb@7d008000 {
                status = "okay";
                nvidia,vbus-gpio = <&gpio 109 0>; /* gpio PN5, USB_VBUS_EN1 */
 
                sdhci1 = "/sdhci@700b0400";
                spi0 = "/spi@7000d400";
                spi1 = "/spi@7000da00";
-               usb0 = "/usb@7d008000";
+               usb0 = "/usb@7d000000";
+               usb1 = "/usb@7d008000";
        };
 
        memory {
                bus-width = <8>;
        };
 
+       usb@7d000000 {
+               status = "okay";
+               dr_mode = "otg";
+               nvidia,vbus-gpio = <&gpio 108 0>; /* gpio PN4, USB_VBUS_EN0 */
+       };
+
        usb@7d008000 {
                status = "okay";
                nvidia,vbus-gpio = <&gpio 109 0>; /* gpio PN5, USB_VBUS_EN1 */
 
                i2c4 = "/i2c@7000c700";
                sdhci0 = "/sdhci@78000600";
                sdhci1 = "/sdhci@78000000";
-               usb0 = "/usb@7d008000";
+               usb0 = "/usb@7d000000";
+               usb1 = "/usb@7d008000";
        };
 
        memory {
                bus-width = <8>;
        };
 
+       usb@7d000000 {
+               status = "okay";
+               dr_mode = "otg";
+               nvidia,vbus-gpio = <&gpio 238 0>; /* gpio DD6, PEX_L1_CLKREQ */
+       };
+
        usb@7d008000 {
                nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */
                status = "okay";
 
 /* USB Host support */
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_USB_STORAGE
 #define CONFIG_CMD_USB
 
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_DHCP
 
+#include "tegra-common-ums.h"
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */
 
 /* USB Host support */
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_USB_STORAGE
 #define CONFIG_CMD_USB
 
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_DHCP
 
+#include "tegra-common-ums.h"
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */
 
--- /dev/null
+/*
+ * (C) Copyright 2014
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#ifndef _TEGRA_COMMON_UMS_H_
+#define _TEGRA_COMMON_UMS_H
+
+#ifndef CONFIG_SPL_BUILD
+/* USB gadget, and mass storage protocol */
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_VBUS_DRAW    2
+#define CONFIG_CI_UDC
+#define CONFIG_CI_UDC_HAS_HOSTPC
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_G_DNL_VENDOR_NUM 0x0955
+#define CONFIG_G_DNL_PRODUCT_NUM 0x701A
+#define CONFIG_G_DNL_MANUFACTURER "NVIDIA"
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_USB_GADGET_MASS_STORAGE
+#define CONFIG_CMD_USB_MASS_STORAGE
+#endif
+
+#endif /* _TEGRA_COMMON_UMS_H */
 
 /* USB Host support */
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
 #define CONFIG_USB_STORAGE
 #define CONFIG_CMD_USB
 
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_DHCP
 
+#include "tegra-common-ums.h"
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */