]> git.sur5r.net Git - u-boot/commitdiff
mx53loco: Add support for 1GHz operation for DA9053-based boards
authorFabio Estevam <festevam@gmail.com>
Mon, 30 Apr 2012 08:12:04 +0000 (08:12 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 15 May 2012 06:31:32 +0000 (08:31 +0200)
There are two types of mx53loco boards: initial boards were built with a Dialog
DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC.

Add DA9053 PMIC support and adjust the required voltages and clocks for running
the CPU at 1GHz.

Tested on both versions of mx53loco boards.

In the case of a MC34708-based board the CPU operating voltage remains at 800MHz.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by : Stefano Babic <sbabic@denx.de>

board/freescale/mx53loco/mx53loco.c
include/configs/mx53loco.h

index 46aaeb2159859e5cf9816406f8ab5bc15dc3abad..0dcec9b987bf90a1bacba714fd650547fab3c1e5 100644 (file)
@@ -36,6 +36,8 @@
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <asm/gpio.h>
+#include <pmic.h>
+#include <dialog_pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -291,6 +293,71 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
+static void setup_iomux_i2c(void)
+{
+       /* I2C1 SDA */
+       mxc_request_iomux(MX53_PIN_CSI0_D8,
+               IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
+       mxc_iomux_set_input(MX53_I2C1_IPP_SDA_IN_SELECT_INPUT,
+               INPUT_CTL_PATH0);
+       mxc_iomux_set_pad(MX53_PIN_CSI0_D8,
+               PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+               PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
+               PAD_CTL_PUE_PULL |
+               PAD_CTL_ODE_OPENDRAIN_ENABLE);
+       /* I2C1 SCL */
+       mxc_request_iomux(MX53_PIN_CSI0_D9,
+               IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
+       mxc_iomux_set_input(MX53_I2C1_IPP_SCL_IN_SELECT_INPUT,
+               INPUT_CTL_PATH0);
+       mxc_iomux_set_pad(MX53_PIN_CSI0_D9,
+               PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+               PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
+               PAD_CTL_PUE_PULL |
+               PAD_CTL_ODE_OPENDRAIN_ENABLE);
+}
+
+static int power_init(void)
+{
+       unsigned int val, ret;
+       struct pmic *p;
+
+       pmic_init();
+       p = get_pmic();
+
+       /* Set VDDA to 1.25V */
+       val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
+       ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
+
+       ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val);
+       val |= DA9052_SUPPLY_VBCOREGO;
+       ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val);
+
+       /* Set Vcc peripheral to 1.35V */
+       ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
+       ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
+
+       return ret;
+}
+
+static void clock_1GHz(void)
+{
+       int ret;
+       u32 ref_clk = CONFIG_SYS_MX5_HCLK;
+       /*
+        * After increasing voltage to 1.25V, we can switch
+        * CPU clock to 1GHz and DDR to 400MHz safely
+        */
+       ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
+       if (ret)
+               printf("CPU:   Switch CPU clock to 1GHZ failed\n");
+
+       ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
+       ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
+       if (ret)
+               printf("CPU:   Switch DDR clock to 400MHz failed\n");
+}
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -316,7 +383,11 @@ int print_cpuinfo(void)
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
+       setup_iomux_i2c();
+       if (!power_init())
+               clock_1GHz();
        print_cpuinfo();
+
        return 0;
 }
 #endif
index 0778bde97768bfc9c5cb1fa7c5df0c146bb89cab..8f43eecdd3b7c4e9ea662e1f6442726e5570e65d 100644 (file)
@@ -41,6 +41,7 @@
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 #define CONFIG_MXC_GPIO
 
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
 
+/* I2C Configs */
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_MX53_PORT1
+#define CONFIG_SYS_I2C_SPEED           100000
+#define CONFIG_SYS_I2C_SLAVE           0xfe
+
+/* PMIC Controller */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_DIALOG_PMIC
+#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR        0x48
+
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX              1