powerpc/mpc85xx: modify erratum A007186

T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index f9085a63e1cd861664d075ff2fcb558effe8deac..ec75383dea69008890132e5258cdc5abdde69e41 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -271,7 +271,8 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        puts("Work-around for Erratum USB14 enabled\n");
 #endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A007186
-       puts("Work-around for Erratum A007186 enabled\n");
+       if (has_erratum_a007186())
+               puts("Work-around for Erratum A007186 enabled\n");
 #endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006593
        puts("Work-around for Erratum A006593 enabled\n");

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 8edf5bb20ef79dc834c5ec5467f03f9cce21c155..5cfae470697ea1877f65d5795a5bc0ee892676a1 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -11,6 +11,7 @@
 #include <asm/processor.h>
 #include <asm/fsl_law.h>
 #include <asm/errno.h>
+#include <asm/fsl_errata.h>
 #include "fsl_corenet2_serdes.h"
 
 #ifdef CONFIG_SYS_FSL_SRDS_1
@@ -203,7 +204,7 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
 
        sel = (sfp_spfr0 >> FUSE_VAL_SHIFT) & FUSE_VAL_MASK;
 
-       if (sel == 0x01 || sel == 0x02) {
+       if (has_erratum_a007186() && (sel == 0x01 || sel == 0x02)) {
                for (pll_num = 0; pll_num < SRDS_MAX_BANK; pll_num++) {
                        pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0);
                        debug("A007186: pll_num=%x pllcr0=%x\n",

diff --git a/arch/powerpc/include/asm/fsl_errata.h b/arch/powerpc/include/asm/fsl_errata.h
index b9e2fb00fa158c17c0dded28416bf0323e8cf5bc..61c6d70c4b71556a188048266a22e82c399d12be 100644 (file)
--- a/arch/powerpc/include/asm/fsl_errata.h
+++ b/arch/powerpc/include/asm/fsl_errata.h
@@ -27,3 +27,27 @@ static inline bool has_erratum_a006379(void)
 }
 #endif
 #endif
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A007186
+static inline bool has_erratum_a007186(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+       case SVR_T4240:
+               return IS_SVR_REV(svr, 2, 0);
+       case SVR_T4160:
+               return IS_SVR_REV(svr, 2, 0);
+       case SVR_B4860:
+               return IS_SVR_REV(svr, 2, 0);
+       case SVR_B4420:
+               return IS_SVR_REV(svr, 2, 0);
+       case SVR_T2081:
+       case SVR_T2080:
+               return IS_SVR_REV(svr, 1, 0);
+       }
+
+       return false;
+}
+#endif