]> git.sur5r.net Git - u-boot/commitdiff
powerpc: mpc83xx: Minimize r1 modification
authormario.six@gdsys.cc <mario.six@gdsys.cc>
Tue, 17 Jan 2017 07:33:47 +0000 (08:33 +0100)
committerYork Sun <york.sun@nxp.com>
Tue, 31 Jan 2017 17:35:06 +0000 (09:35 -0800)
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc83xx/start.S

index 00016877030e3ae1a0bab6a7f517bb1543982226..c366f615e7965c071e475aa5da3bee8b9a928616 100644 (file)
@@ -258,14 +258,17 @@ in_flash:
 #endif
 
        /* set up the stack pointer in our newly created
-        * cache-ram (r1) */
-       lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
-       ori     r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
+        * cache-ram; use r3 to keep the new SP for now to
+        * avoid overiding the SP it uselessly */
+       lis     r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
+       ori     r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
 
        li      r0, 0           /* Make room for stack frame header and */
-       stwu    r0, -4(r1)      /* clear final stack frame so that      */
-       stwu    r0, -4(r1)      /* stack backtraces terminate cleanly   */
+       stwu    r0, -4(r3)      /* clear final stack frame so that      */
+       stwu    r0, -4(r3)      /* stack backtraces terminate cleanly   */
 
+       /* Finally, actually set SP */
+       mr      r1, r3
 
        /* let the C-code set up the rest                           */
        /*                                                          */