*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = 1;
- for(j = 0; j < 8; j++) {
+ for (j = 0; j < 8; j++) {
if (argv[2][j] == '.') {
alen = argv[2][j+1] - '0';
if (alen > 4) {
return 1;
}
break;
- } else if (argv[2][j] == '\0') {
+ } else if (argv[2][j] == '\0')
break;
- }
}
/*
linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
- if(i2c_read(chip, addr, alen, linebuf, linebytes) != 0) {
+ if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
puts ("Error reading the chip.\n");
- } else {
+ else {
printf("%04x:", addr);
cp = linebuf;
for (j=0; j<linebytes; j++) {
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = 1;
- for(j = 0; j < 8; j++) {
+ for (j = 0; j < 8; j++) {
if (argv[2][j] == '.') {
alen = argv[2][j+1] - '0';
- if(alen > 4) {
+ if (alen > 4) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
break;
- } else if (argv[2][j] == '\0') {
+ } else if (argv[2][j] == '\0')
break;
- }
}
/*
/*
* Optional count
*/
- if(argc == 5) {
+ if (argc == 5)
count = simple_strtoul(argv[4], NULL, 16);
- } else {
+ else
count = 1;
- }
while (count-- > 0) {
- if(i2c_write(chip, addr++, alen, &byte, 1) != 0) {
+ if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
puts ("Error writing the chip.\n");
- }
/*
* Wait for the write to complete. The write can take
* up to 10mSec (we allow a little more time).
#endif
#if 0
- for(timeout = 0; timeout < 10; timeout++) {
+ for (timeout = 0; timeout < 10; timeout++) {
udelay(2000);
- if(i2c_probe(chip) == 0)
+ if (i2c_probe(chip) == 0)
break;
}
#endif
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = 1;
- for(j = 0; j < 8; j++) {
+ for (j = 0; j < 8; j++) {
if (argv[2][j] == '.') {
alen = argv[2][j+1] - '0';
- if(alen > 4) {
+ if (alen > 4) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
break;
- } else if (argv[2][j] == '\0') {
+ } else if (argv[2][j] == '\0')
break;
- }
}
/*
*/
crc = 0;
err = 0;
- while(count-- > 0) {
- if(i2c_read(chip, addr, alen, &byte, 1) != 0) {
+ while (count-- > 0) {
+ if (i2c_read(chip, addr, alen, &byte, 1) != 0)
err++;
- }
crc = crc32 (crc, &byte, 1);
addr++;
}
- if(err > 0)
- {
+ if (err > 0)
puts ("Error reading the chip,\n");
- } else {
+ else
printf ("%08lx\n", crc);
- }
return 0;
}
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = 1;
- for(j = 0; j < 8; j++) {
+ for (j = 0; j < 8; j++) {
if (argv[2][j] == '.') {
alen = argv[2][j+1] - '0';
- if(alen > 4) {
+ if (alen > 4) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
break;
- } else if (argv[2][j] == '\0') {
+ } else if (argv[2][j] == '\0')
break;
- }
}
}
*/
do {
printf("%08lx:", addr);
- if(i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) {
+ if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
puts ("\nError reading the chip,\n");
- } else {
+ else {
data = cpu_to_be32(data);
- if(size == 1) {
+ if (size == 1)
printf(" %02lx", (data >> 24) & 0x000000FF);
- } else if(size == 2) {
+ else if (size == 2)
printf(" %04lx", (data >> 16) & 0x0000FFFF);
- } else {
+ else
printf(" %08lx", data);
- }
}
nbytes = readline (" ? ");
#endif
}
#ifdef CONFIG_BOOT_RETRY_TIME
- else if (nbytes == -2) {
+ else if (nbytes == -2)
break; /* timed out, exit the command */
- }
#endif
else {
char *endp;
data = simple_strtoul(console_buffer, &endp, 16);
- if(size == 1) {
+ if (size == 1)
data = data << 24;
- } else if(size == 2) {
+ else if (size == 2)
data = data << 16;
- }
data = be32_to_cpu(data);
nbytes = endp - console_buffer;
if (nbytes) {
*/
reset_cmd_timeout();
#endif
- if(i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) {
+ if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
puts ("Error writing the chip.\n");
- }
#ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS
udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
#endif /* NOPROBES */
puts ("Valid chip addresses:");
- for(j = 0; j < 128; j++) {
+ for (j = 0; j < 128; j++) {
#if defined(CFG_I2C_NOPROBES)
skip = 0;
- for(k=0; k < NUM_ELEMENTS_NOPROBE; k++)
- {
- if(COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k))
- {
+ for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
+ if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
skip = 1;
break;
}
if (skip)
continue;
#endif
- if(i2c_probe(j) == 0) {
+ if (i2c_probe(j) == 0)
printf(" %02X", j);
- }
}
putc ('\n');
#if defined(CFG_I2C_NOPROBES)
puts ("Excluded chip addresses:");
- for(k=0; k < NUM_ELEMENTS_NOPROBE; k++)
- {
- if(COMPARE_BUS(bus,k))
+ for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
+ if (COMPARE_BUS(bus,k))
printf(" %02X", NO_PROBE_ADDR(k));
}
putc ('\n');
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = 1;
- for(j = 0; j < 8; j++) {
+ for (j = 0; j < 8; j++) {
if (argv[2][j] == '.') {
alen = argv[2][j+1] - '0';
if (alen > 4) {
return 1;
}
break;
- } else if (argv[2][j] == '\0') {
+ } else if (argv[2][j] == '\0')
break;
- }
}
/*
*/
length = 1;
length = simple_strtoul(argv[3], NULL, 16);
- if(length > sizeof(bytes)) {
+ if (length > sizeof(bytes))
length = sizeof(bytes);
- }
/*
* The delay time (uSec) is optional.
*/
delay = 1000;
- if (argc > 3) {
+ if (argc > 3)
delay = simple_strtoul(argv[4], NULL, 10);
- }
/*
* Run the loop...
*/
- while(1) {
- if(i2c_read(chip, addr, alen, bytes, length) != 0) {
+ while (1) {
+ if (i2c_read(chip, addr, alen, bytes, length) != 0)
puts ("Error reading the chip.\n");
- }
udelay(delay);
}
*/
chip = simple_strtoul(argv[1], NULL, 16);
- if(i2c_read(chip, 0, 1, data, sizeof(data)) != 0) {
+ if (i2c_read(chip, 0, 1, data, sizeof(data)) != 0) {
puts ("No SDRAM Serial Presence Detect found.\n");
return 1;
}
for (j = 0; j < 63; j++) {
cksum += data[j];
}
- if(cksum != data[63]) {
+ if (cksum != data[63]) {
printf ("WARNING: Configuration data checksum failure:\n"
" is 0x%02x, calculated 0x%02x\n",
data[63], cksum);
default: puts ("unknown\n"); break;
}
puts ("Row address bits ");
- if((data[3] & 0x00F0) == 0) {
+ if ((data[3] & 0x00F0) == 0)
printf("%d\n", data[3] & 0x0F);
- } else {
+ else
printf("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
- }
puts ("Column address bits ");
- if((data[4] & 0x00F0) == 0) {
+ if ((data[4] & 0x00F0) == 0)
printf("%d\n", data[4] & 0x0F);
- } else {
+ else
printf("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
- }
printf("Module rows %d\n", data[5]);
printf("Module data width %d bits\n", (data[7] << 8) | data[6]);
puts ("Interface signal levels ");
case 2: puts ("ECC\n"); break;
default: puts ("unknown\n"); break;
}
- if((data[12] & 0x80) == 0) {
+ if ((data[12] & 0x80) == 0)
puts ("No self refresh, rate ");
- } else {
+ else
puts ("Self refresh, rate ");
- }
switch(data[12] & 0x7F) {
case 0: puts ("15.625uS\n"); break;
case 1: puts ("3.9uS\n"); break;
default: puts ("unknown\n"); break;
}
printf("SDRAM width (primary) %d\n", data[13] & 0x7F);
- if((data[13] & 0x80) != 0) {
+ if ((data[13] & 0x80) != 0) {
printf(" (second bank) %d\n",
2 * (data[13] & 0x7F));
}
- if(data[14] != 0) {
+ if (data[14] != 0) {
printf("EDC width %d\n",
data[14] & 0x7F);
- if((data[14] & 0x80) != 0) {
+ if ((data[14] & 0x80) != 0)
printf(" (second bank) %d\n",
2 * (data[14] & 0x7F));
- }
}
printf("Min clock delay, back-to-back random column addresses %d\n",
data[15]);
(data[35] & 0x80) ? '-' : '+',
(data[35] >> 4) & 0x07, data[35] & 0x0F);
puts ("Manufacturer's JEDEC ID ");
- for(j = 64; j <= 71; j++)
+ for (j = 64; j <= 71; j++)
printf("%02X ", data[j]);
putc ('\n');
printf("Manufacturing Location %02X\n", data[72]);
puts ("Manufacturer's Part Number ");
- for(j = 73; j <= 90; j++)
+ for (j = 73; j <= 90; j++)
printf("%02X ", data[j]);
putc ('\n');
printf("Revision Code %02X %02X\n", data[91], data[92]);
printf("Manufacturing Date %02X %02X\n", data[93], data[94]);
puts ("Assembly Serial Number ");
- for(j = 95; j <= 98; j++)
+ for (j = 95; j <= 98; j++)
printf("%02X ", data[j]);
putc ('\n');
printf("Speed rating PC%d\n",
{
int bus_idx, ret=0;
- if (argc == 1) /* querying current setting */
- {
+ if (argc == 1)
+ /* querying current setting */
printf("Current bus is %d\n", i2c_get_bus_num());
- }
- else
- {
+ else {
bus_idx = simple_strtoul(argv[1], NULL, 10);
printf("Setting bus to %d\n", bus_idx);
ret = i2c_set_bus_num(bus_idx);
- if(ret)
- {
+ if (ret)
printf("Failure changing bus number (%d)\n", ret);
- }
}
return ret;
}
{
int speed, ret=0;
- if (argc == 1) /* querying current speed */
- {
+ if (argc == 1)
+ /* querying current speed */
printf("Current bus speed=%d\n", i2c_get_bus_speed());
- }
- else
- {
+ else {
speed = simple_strtoul(argv[1], NULL, 10);
printf("Setting bus speed to %d Hz\n", speed);
ret = i2c_set_bus_speed(speed);
- if(ret)
- {
+ if (ret)
printf("Failure changing bus speed (%d)\n", ret);
- }
}
return ret;
}
int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
#if defined(CONFIG_I2C_MULTI_BUS)
- if(!strncmp(argv[1], "de", 2))
- {
+ if (!strncmp(argv[1], "de", 2))
return do_i2c_bus_num(cmdtp, flag, --argc, ++argv);
- }
#endif /* CONFIG_I2C_MULTI_BUS */
- if(!strncmp(argv[1], "sp", 2))
- {
+ if (!strncmp(argv[1], "sp", 2))
return do_i2c_bus_speed(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "md", 2))
- {
+ if (!strncmp(argv[1], "md", 2))
return do_i2c_md(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "mm", 2))
- {
+ if (!strncmp(argv[1], "mm", 2))
return do_i2c_mm(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "mw", 2))
- {
+ if (!strncmp(argv[1], "mw", 2))
return do_i2c_mw(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "nm", 2))
- {
+ if (!strncmp(argv[1], "nm", 2))
return do_i2c_nm(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "cr", 2))
- {
+ if (!strncmp(argv[1], "cr", 2))
return do_i2c_crc(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "pr", 2))
- {
+ if (!strncmp(argv[1], "pr", 2))
return do_i2c_probe(cmdtp, flag, --argc, ++argv);
- }
- if(!strncmp(argv[1], "lo", 2))
- {
+ if (!strncmp(argv[1], "lo", 2))
return do_i2c_loop(cmdtp, flag, --argc, ++argv);
- }
#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
- if(!strncmp(argv[1], "sd", 2))
- {
+ if (!strncmp(argv[1], "sd", 2))
return do_sdram(cmdtp, flag, --argc, ++argv);
- }
#endif /* CFG_CMD_SDRAM */
else
- {
printf ("Usage:\n%s\n", cmdtp->usage);
- }
return 0;
}
#endif /* CONFIG_I2C_CMD_TREE */
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
- *
- * Change log:
- *
- * 20050101: Eran Liberty (liberty@freescale.com)
- * Initial file creating (porting from 85XX & 8260)
- * 20060601: Dave Liu (daveliu@freescale.com)
- * DDR ECC support
- * unify variable names for 83xx
- * code cleanup
*/
#include <common.h>
#ifdef CONFIG_SPD_EEPROM
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
extern void dma_init(void);
extern uint dma_check(void);
/*
* Convert picoseconds into clock cycles (rounding up if needed).
*/
-extern ulong get_ddr_clk(ulong dummy);
-
int
picos_to_clk(int picos)
{
unsigned int ddr_bus_clk;
int clks;
- ddr_bus_clk = get_ddr_clk(0) >> 1;
+ ddr_bus_clk = gd->ddr_clk >> 1;
clks = picos / ((1000000000 / ddr_bus_clk) * 1000);
- if (picos % ((1000000000 / ddr_bus_clk) * 1000) !=0) {
+ if (picos % ((1000000000 / ddr_bus_clk) * 1000) != 0)
clks++;
- }
return clks;
}
debug("DDR:Module maximum data rate is: %dMhz\n", max_data_rate);
- ddrc_clk = get_ddr_clk(0) / 1000000;
+ ddrc_clk = gd->ddr_clk / 1000000;
if (max_data_rate >= 390) { /* it is DDR 400 */
if (ddrc_clk <= 410 && ddrc_clk > 350) {
} else if (ddrc_clk <= 350 && ddrc_clk > 280) {
/* DDR controller clk at 280~350 */
effective_data_rate = 333; /* 6ns */
- if (spd.clk_cycle2 == 0x60) {
+ if (spd.clk_cycle2 == 0x60)
caslat = caslat - 1;
- } else {
+ else
caslat = caslat;
- }
} else if (ddrc_clk <= 280 && ddrc_clk > 230) {
/* DDR controller clk at 230~280 */
effective_data_rate = 266; /* 7.5ns */
- if (spd.clk_cycle3 == 0x75) {
+ if (spd.clk_cycle3 == 0x75)
caslat = caslat - 2;
- } else if (spd.clk_cycle2 == 0x60) {
+ else if (spd.clk_cycle2 == 0x60)
caslat = caslat - 1;
- } else {
+ else
caslat = caslat;
- }
} else if (ddrc_clk <= 230 && ddrc_clk > 90) {
/* DDR controller clk at 90~230 */
effective_data_rate = 200; /* 10ns */
- if (spd.clk_cycle3 == 0x75) {
+ if (spd.clk_cycle3 == 0x75)
caslat = caslat - 2;
- } else if (spd.clk_cycle2 == 0x60) {
+ else if (spd.clk_cycle2 == 0x60)
caslat = caslat - 1;
- } else {
+ else
caslat = caslat;
- }
}
} else if (max_data_rate >= 323) { /* it is DDR 333 */
if (ddrc_clk <= 350 && ddrc_clk > 280) {
} else if (ddrc_clk <= 280 && ddrc_clk > 230) {
/* DDR controller clk at 230~280 */
effective_data_rate = 266; /* 7.5ns */
- if (spd.clk_cycle2 == 0x75) {
+ if (spd.clk_cycle2 == 0x75)
caslat = caslat - 1;
- } else {
+ else
caslat = caslat;
- }
} else if (ddrc_clk <= 230 && ddrc_clk > 90) {
/* DDR controller clk at 90~230 */
effective_data_rate = 200; /* 10ns */
- if (spd.clk_cycle3 == 0xa0) {
+ if (spd.clk_cycle3 == 0xa0)
caslat = caslat - 2;
- } else if (spd.clk_cycle2 == 0x75) {
+ else if (spd.clk_cycle2 == 0x75)
caslat = caslat - 1;
- } else {
+ else
caslat = caslat;
- }
}
} else if (max_data_rate >= 256) { /* it is DDR 266 */
if (ddrc_clk <= 350 && ddrc_clk > 280) {
} else if (ddrc_clk <= 230 && ddrc_clk > 90) {
/* DDR controller clk at 90~230 */
effective_data_rate = 200; /* 10ns */
- if (spd.clk_cycle2 == 0xa0) {
+ if (spd.clk_cycle2 == 0xa0)
caslat = caslat - 1;
- }
}
} else if (max_data_rate >= 190) { /* it is DDR 200 */
if (ddrc_clk <= 350 && ddrc_clk > 230) {
* Errata DDR6 work around: input enable 2 cycles earlier.
* including MPC834x Rev1.0/1.1 and MPC8360 Rev1.1/1.2.
*/
- if (caslat == 2) {
+ if (caslat == 2)
ddr->debug_reg = 0x201c0000; /* CL=2 */
- } else if (caslat == 3) {
+ else if (caslat == 3)
ddr->debug_reg = 0x202c0000; /* CL=2.5 */
- } else if (caslat == 4) {
+ else if (caslat == 4)
ddr->debug_reg = 0x202c0000; /* CL=3.0 */
- }
+
__asm__ __volatile__ ("sync");
debug("Errata DDR6 (debug_reg=0x%08x)\n", ddr->debug_reg);
}
/* Is this an ECC DDR chip? */
- if (spd.config == 0x02) {
+ if (spd.config == 0x02)
printf(" with ECC\n");
- } else {
+ else
printf(" without ECC\n");
- }
/* Burst length is always 4 for 64 bit data bus, 8 for 32 bit data bus,
Burst type is sequential
sdram_cfg = 0xC2000000;
/* sdram_cfg[3] = RD_EN - registered DIMM enable */
- if (spd.mod_attr & 0x02) {
+ if (spd.mod_attr & 0x02)
sdram_cfg |= 0x10000000;
- }
/* The DIMM is 32bit width */
- if (spd.dataw_lsb == 0x20) {
+ if (spd.dataw_lsb == 0x20)
sdram_cfg |= 0x000C0000;
- }
+
ddrc_ecc_enable = 0;
#if defined(CONFIG_DDR_ECC)