]> git.sur5r.net Git - u-boot/commitdiff
ColdFire 54455: Fix correct boot location for atmel and intel
authorTsiChungLiew <Tsi-Chung.Liew@freescale.com>
Thu, 25 Oct 2007 22:16:22 +0000 (17:16 -0500)
committerTsiChungLiew <Tsi-Chung.Liew@freescale.com>
Thu, 25 Oct 2007 22:16:22 +0000 (17:16 -0500)
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Makefile
board/freescale/m54455evb/config.mk
include/configs/M54455EVB.h

index ce7b07f9d18acba0e1862d40781fca88434548ab..850c68e235c2d9ae68eaa589e99793a2c1f8b5a1 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1733,9 +1733,13 @@ M54455EVB_i66_config :   unconfig
        >include/config.h ; \
        if [ "$${FLASH}" == "INTEL" ] ; then \
                echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
+               echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+               cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \
                echo "... with INTEL boot..." ; \
        else \
                echo "#define CFG_ATMEL_BOOT"   >> $(obj)include/config.h ; \
+               echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \
+               cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \
                echo "... with ATMEL boot..." ; \
        fi; \
        echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
index ce014edca8fdd71563af610c37708b5317ac24f2..b42fcc94ce7de4d7b8d5c2a02ed4692c504c4e5a 100644 (file)
@@ -22,4 +22,6 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
index 6f4859c238037a1e9d8d713574d92a4b82955cc2..ba050cb7e466110c712daa22def30e308876dbb5 100644 (file)
@@ -27,8 +27,8 @@
  * board/config.h - configuration options, board specific
  */
 
-#ifndef _JAMICA54455_H
-#define _JAMICA54455_H
+#ifndef _M54455EVB_H
+#define _M54455EVB_H
 
 /*
  * High Level Configuration Options
@@ -75,7 +75,7 @@
 #define CONFIG_CMD_MISC
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
-#define CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCI
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO
 
        "u-boot=u-boot.bin\0"                   \
        "load=tftp ${loadaddr) ${u-boot}\0"     \
        "upd=run load; run prog\0"              \
-       "prog=prot off 2ffff;"                \
-       "era 2ffff;"                          \
+       "prog=prot off 4000000 402ffff;"                \
+       "era 4000000 402ffff;"                          \
        "cp.b ${loadaddr} 0 ${filesize};"       \
        "save\0"                                \
        ""
 #define CFG_IMMR               CFG_MBAR
 
 /* PCI */
+#ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI             1
 
 #define CFG_PCI_MEM_BUS                0xA0000000
 #define CFG_PCI_CFG_BUS                0xB0000000
 #define CFG_PCI_CFG_PHYS       CFG_PCI_CFG_BUS
 #define CFG_PCI_CFG_SIZE       0x01000000
+#endif
 
 /* FPGA - Spartan 2 */
 /* experiment
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
  */
-#define CFG_ENV_OFFSET         0x4000
-#define CFG_ENV_SECT_SIZE      0x2000
 #define CFG_ENV_IS_IN_FLASH    1
 #define CONFIG_ENV_OVERWRITE   1
 #undef CFG_ENV_IS_EMBEDDED
  * FLASH organization
  */
 #ifdef CFG_ATMEL_BOOT
-#      define CFG_FLASH_BASE           0
+#      define CFG_FLASH_BASE           CFG_CS0_BASE    
 #      define CFG_FLASH0_BASE          CFG_CS0_BASE
 #      define CFG_FLASH1_BASE          CFG_CS1_BASE
+#      define CFG_ENV_ADDR             (CFG_FLASH_BASE + 0x4000)
+#      define CFG_ENV_SECT_SIZE        0x2000
 #else
 #      define CFG_FLASH_BASE           CFG_FLASH0_BASE
 #      define CFG_FLASH0_BASE          CFG_CS1_BASE
 #      define CFG_FLASH1_BASE          CFG_CS0_BASE
+#      define CFG_ENV_ADDR             (CFG_FLASH_BASE + 0x60000)
+#      define CFG_ENV_SECT_SIZE        0x20000
 #endif
 
 /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
  * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
  */
 #ifdef CFG_ATMEL_BOOT
-#      define CONFIG_JFFS2_DEV         "nor0"
+#      define CONFIG_JFFS2_DEV         "nor1"
 #      define CONFIG_JFFS2_PART_SIZE   0x01000000
-#      define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE
+#      define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000)
 #else
 #      define CONFIG_JFFS2_DEV         "nor0"
 #      define CONFIG_JFFS2_PART_SIZE   (0x01000000 - 0x500000)
 
 #ifdef CFG_ATMEL_BOOT
  /* Atmel Flash */
-#define CFG_CS0_BASE           0
+#define CFG_CS0_BASE           0x04000000
 #define CFG_CS0_MASK           0x00070001
 #define CFG_CS0_CTRL           0x00001140
 /* Intel Flash */
-#define CFG_CS1_BASE           0x04000000
+#define CFG_CS1_BASE           0x00000000
 #define CFG_CS1_MASK           0x01FF0001
-#define CFG_CS1_CTRL           0x003F3D60
+#define CFG_CS1_CTRL           0x00000D60
 
 #define CFG_ATMEL_BASE         CFG_CS0_BASE
 #else
 /* Intel Flash */
-#define CFG_CS0_BASE           0
+#define CFG_CS0_BASE           0x00000000
 #define CFG_CS0_MASK           0x01FF0001
-#define CFG_CS0_CTRL           0x003F3D60
+#define CFG_CS0_CTRL           0x00000D60
  /* Atmel Flash */
 #define CFG_CS1_BASE           0x04000000
 #define CFG_CS1_MASK           0x00070001
 #define CFG_CS3_MASK           0x00070001
 #define CFG_CS3_CTRL           0x00000020
 
-#endif                         /* _JAMICA54455_H */
+#endif                         /* _M54455EVB_H */