]> git.sur5r.net Git - u-boot/commitdiff
board: sama5d4_xplained: Convert to CONFIG_DM_VIDEO
authorWenyou Yang <wenyou.yang@atmel.com>
Mon, 18 Sep 2017 07:26:00 +0000 (15:26 +0800)
committerAnatolij Gustschin <agust@denx.de>
Fri, 29 Sep 2017 15:51:22 +0000 (17:51 +0200)
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/at91-sama5d4_xplained.dts
arch/arm/dts/sama5d4.dtsi
arch/arm/mach-at91/Kconfig
board/atmel/common/video_display.c
board/atmel/sama5d4_xplained/sama5d4_xplained.c
configs/sama5d4_xplained_mmc_defconfig
configs/sama5d4_xplained_nandflash_defconfig
configs/sama5d4_xplained_spiflash_defconfig
include/configs/sama5d4_xplained.h

index 0592b31b91733ef846dacdebc083175dd395b2e0..ea35dc21b6fe61e692302de7465b84c525d2ff35 100644 (file)
 
        ahb {
                apb {
+                       hlcdc: hlcdc@f0000000 {
+                               atmel,vl-bpix = <4>;
+                               atmel,guard-time = <1>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
+                               status = "okay";
+                               u-boot,dm-pre-reloc;
+
+                               display-timings {
+                                       u-boot,dm-pre-reloc;
+                                       480x272 {
+                                               clock-frequency = <9000000>;
+                                               hactive = <480>;
+                                               vactive = <272>;
+                                               hsync-len = <41>;
+                                               hfront-porch = <2>;
+                                               hback-porch = <2>;
+                                               vfront-porch = <2>;
+                                               vback-porch = <2>;
+                                               vsync-len = <11>;
+                                               u-boot,dm-pre-reloc;
+                                       };
+                               };
+                       };
+
                        spi0: spi@f8010000 {
                                u-boot,dm-pre-reloc;
                                cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
index c6512ae437c6062e7be05b5c4e15060a890a5d7b..8072b8a4f23a037169abc32803eb178d9df65815 100644 (file)
                        u-boot,dm-pre-reloc;
 
                        hlcdc: hlcdc@f0000000 {
-                               compatible = "atmel,sama5d4-hlcdc";
+                               compatible = "atmel,at91sam9x5-hlcdc";
                                reg = <0xf0000000 0x4000>;
                                interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
                                clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
                                clock-names = "periph_clk","sys_clk", "slow_clk";
                                status = "disabled";
-
-                               hlcdc-display-controller {
-                                       compatible = "atmel,hlcdc-display-controller";
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-
-                                       port@0 {
-                                               #address-cells = <1>;
-                                               #size-cells = <0>;
-                                               reg = <0>;
-                                       };
-                               };
-
-                               hlcdc_pwm: hlcdc-pwm {
-                                       compatible = "atmel,hlcdc-pwm";
-                                       pinctrl-names = "default";
-                                       pinctrl-0 = <&pinctrl_lcd_pwm>;
-                                       #pwm-cells = <3>;
-                               };
                        };
 
                        dma1: dma-controller@f0004000 {
index b4967f9203b9ad7f73f94869f84dd641531974a6..ebd865ab5bf2b79123e3c5f1428a8a4726205c09 100644 (file)
@@ -186,6 +186,7 @@ config TARGET_SAMA5D4_XPLAINED
        select SAMA5D4
        select SUPPORT_SPL
        select BOARD_EARLY_INIT_F
+       select BOARD_LATE_INIT
 
 config TARGET_SAMA5D4EK
        bool "SAMA5D4 Evaluation Kit"
index 39ad6198192c507a7e3a8eeb0f48319114fc4768..b20abc738674a0d2cfa7e61d0ee4f8d309b467be 100644 (file)
@@ -43,7 +43,7 @@ int at91_video_show_board_info(void)
        nand_size = 0;
 #ifdef CONFIG_NAND_ATMEL
        for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-               nand_size += nand_info[i]->size;
+               nand_size += get_nand_dev_by_index(i)->size;
 #endif
 
        len += sprintf(&buf[len], "%ld MB SDRAM, %ld MB NAND\n",
index 9236a285492105224d3d40203f1e9f9eb3520410..78eddb8beb01f749829a20493c764ab2cb83e340 100644 (file)
 #include <asm/arch/clk.h>
 #include <asm/arch/sama5d3_smc.h>
 #include <asm/arch/sama5d4.h>
-#include <atmel_hlcdc.h>
 #include <debug_uart.h>
-#include <lcd.h>
-#include <nand.h>
-#include <version.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -73,98 +69,15 @@ static void sama5d4_xplained_usb_hw_init(void)
 }
 #endif
 
-#ifdef CONFIG_LCD
-vidinfo_t panel_info = {
-       .vl_col = 480,
-       .vl_row = 272,
-       .vl_clk = 9000000,
-       .vl_bpix = LCD_BPP,
-       .vl_tft = 1,
-       .vl_hsync_len = 41,
-       .vl_left_margin = 2,
-       .vl_right_margin = 2,
-       .vl_vsync_len = 11,
-       .vl_upper_margin = 2,
-       .vl_lower_margin = 2,
-       .mmio = ATMEL_BASE_LCDC,
-};
-
-/* No power up/down pin for the LCD pannel */
-void lcd_enable(void)  { /* Empty! */ }
-void lcd_disable(void) { /* Empty! */ }
-
-unsigned int has_lcdc(void)
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
 {
-       return 1;
-}
-
-static void sama5d4_xplained_lcd_hw_init(void)
-{
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0);  /* LCDPWM */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0);  /* LCDDISP */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0);  /* LCDVSYNC */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0);  /* LCDHSYNC */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0);  /* LCDDOTCK */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0);  /* LCDDEN */
-
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  0, 0);  /* LCDD0 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  1, 0);  /* LCDD1 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  2, 0);  /* LCDD2 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  3, 0);  /* LCDD3 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  4, 0);  /* LCDD4 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  5, 0);  /* LCDD5 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  6, 0);  /* LCDD6 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  7, 0);  /* LCDD7 */
-
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  8, 0);  /* LCDD9 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA,  9, 0);  /* LCDD8 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0);  /* LCDD10 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0);  /* LCDD11 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0);  /* LCDD12 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0);  /* LCDD13 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0);  /* LCDD14 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0);  /* LCDD15 */
-
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 0);  /* LCDD16 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 0);  /* LCDD17 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0);  /* LCDD18 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0);  /* LCDD19 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0);  /* LCDD20 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0);  /* LCDD21 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0);  /* LCDD22 */
-       at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0);  /* LCDD23 */
-
-       /* Enable clock */
-       at91_periph_clk_enable(ATMEL_ID_LCDC);
-}
-
-#ifdef CONFIG_LCD_INFO
-void lcd_show_board_info(void)
-{
-       ulong dram_size, nand_size;
-       int i;
-       char temp[32];
-
-       lcd_printf("%s\n", U_BOOT_VERSION);
-       lcd_printf("2014 ATMEL Corp\n");
-       lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
-                  strmhz(temp, get_cpu_clk_rate()));
-
-       dram_size = 0;
-       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
-               dram_size += gd->bd->bi_dram[i].size;
-
-       nand_size = 0;
-#ifdef CONFIG_NAND_ATMEL
-       for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-               nand_size += get_nand_dev_by_index(i)->size;
+#ifdef CONFIG_DM_VIDEO
+       at91_video_show_board_info();
 #endif
-       lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
-                  dram_size >> 20, nand_size >> 20);
+       return 0;
 }
-#endif /* CONFIG_LCD_INFO */
-
-#endif /* CONFIG_LCD */
+#endif
 
 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
 static void sama5d4_xplained_serial3_hw_init(void)
@@ -212,9 +125,6 @@ int board_init(void)
 #ifdef CONFIG_NAND_ATMEL
        sama5d4_xplained_nand_hw_init();
 #endif
-#ifdef CONFIG_LCD
-       sama5d4_xplained_lcd_hw_init();
-#endif
 #ifdef CONFIG_CMD_USB
        sama5d4_xplained_usb_hw_init();
 #endif
index dabbf605c5a928b5bb01ecd9e30cd8d1cf12de48..8ecba5b7d4fd533ae6d116754863f190ffcfd78b 100644 (file)
@@ -78,3 +78,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
index 85157878cdab5962b236d1f3bac5569cb71bdd66..bd3131f4cc09bf63c397a41f9434348da64edfab 100644 (file)
@@ -75,3 +75,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
index 4061720b3a835a43696c7db9819f67e17f7d65ae..d37be67eb664cf3280e440f3ac9b29b2f92fd300 100644 (file)
@@ -77,3 +77,5 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_DM_VIDEO=y
+CONFIG_ATMEL_HLCD=y
index 5dc5e7dd0c575415ff9e7bc835a8d6a39fc77dd2..6aa4bcc5c55e10b5fbab0343915b99a74cc019f1 100644 (file)
 #define CONFIG_ATMEL_NAND_HW_PMECC
 #endif
 
-/* LCD */
-#ifdef CONFIG_LCD
-#define LCD_BPP                                LCD_COLOR16
-#define LCD_OUTPUT_BPP                  24
-#define CONFIG_LCD_LOGO
-#define CONFIG_LCD_INFO
-#define CONFIG_LCD_INFO_BELOW_LOGO
-#define CONFIG_ATMEL_HLCD
-#define CONFIG_ATMEL_LCD_RGB565
-#endif
-
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x200000