]> git.sur5r.net Git - u-boot/commitdiff
ppc: arm: Move sdhc_clk into arch_global_data
authorSimon Glass <sjg@chromium.org>
Thu, 13 Dec 2012 20:49:05 +0000 (20:49 +0000)
committerTom Rini <trini@ti.com>
Mon, 4 Feb 2013 14:05:44 +0000 (09:05 -0500)
This is used by both powerpc and arm, but I think it still qualifies as
architecture-specific.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/cpu/arm1136/mx35/generic.c
arch/arm/cpu/arm926ejs/mx25/generic.c
arch/arm/imx-common/speed.c
arch/arm/include/asm/global_data.h
arch/powerpc/cpu/mpc83xx/speed.c
arch/powerpc/cpu/mpc85xx/speed.c
arch/powerpc/include/asm/global_data.h
drivers/mmc/fsl_esdhc.c

index 295a98ea4b6d5fabf9de1c01fb03a4f40c668b94..d11e6f6270cd4b3c5a2e8b5b99380a7a61045536 100644 (file)
@@ -478,11 +478,11 @@ int get_clocks(void)
 {
 #ifdef CONFIG_FSL_ESDHC
 #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
 #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 #else
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
 #endif
 #endif
        return 0;
index b9914186b19bad91dbd9202eefc54b38573cbcf1..679273b2b4dc66828726877ffb9bb74b91da1ca8 100644 (file)
@@ -229,9 +229,9 @@ int get_clocks(void)
 {
 #ifdef CONFIG_FSL_ESDHC
 #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
 #else
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
 #endif
 #endif
        return 0;
index fbf4de3b30042d0e5d2f608681888555e41add06..638ee1aa75cbcb81ab2b26572cae6dd48f236108 100644 (file)
@@ -37,23 +37,23 @@ int get_clocks(void)
 #ifdef CONFIG_FSL_ESDHC
 #ifdef CONFIG_FSL_USDHC
 #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
 #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
 #else
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
 #endif
 #else
 #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
 #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
 #else
-       gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
 #endif
 #endif
 #endif
index 0c1dbe866a88166791056b310d5ee7ba36ef0df1..a3398cfc2d81f7fdc326bde22c17df82acc62f27 100644 (file)
@@ -26,6 +26,9 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
+#if defined(CONFIG_FSL_ESDHC)
+       u32 sdhc_clk;
+#endif
 #ifdef CONFIG_AT91FAMILY
        /* "static data" needed by at91's clock.c */
        unsigned long   cpu_clk_rate_hz;
@@ -69,9 +72,6 @@ typedef       struct  global_data {
        unsigned long   env_addr;       /* Address  of Environment struct */
        unsigned long   env_valid;      /* Checksum of Environment valid? */
        unsigned long   fb_base;        /* base address of frame buffer */
-#ifdef CONFIG_FSL_ESDHC
-       unsigned long   sdhc_clk;
-#endif
        unsigned long   relocaddr;      /* Start address of U-Boot in RAM */
        phys_size_t     ram_size;       /* RAM size */
        unsigned long   mon_len;        /* monitor len */
index ba8b285d57ee7be25d82eb698161f9cd32eb3b9b..6be0e3a2ee41c7f36258cf0550d651a349ab1696 100644 (file)
@@ -478,7 +478,7 @@ int get_clocks(void)
        gd->arch.tdm_clk = tdm_clk;
 #endif
 #if defined(CONFIG_FSL_ESDHC)
-       gd->sdhc_clk = sdhc_clk;
+       gd->arch.sdhc_clk = sdhc_clk;
 #endif
        gd->arch.core_clk = core_clk;
        gd->arch.i2c1_clk = i2c1_clk;
@@ -570,7 +570,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
               strmhz(buf, gd->arch.tdm_clk));
 #endif
 #if defined(CONFIG_FSL_ESDHC)
-       printf("  SDHC:                %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
+       printf("  SDHC:                %-4s MHz\n",
+              strmhz(buf, gd->arch.sdhc_clk));
 #endif
 #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
        defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
index 7173c07b092978841c62fb1be0ab92a61e5f20b3..297f2ed4739f2080e35207cb9521511c98ee27f8 100644 (file)
@@ -428,9 +428,9 @@ int get_clocks (void)
 #if defined(CONFIG_FSL_ESDHC)
 #if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
        defined(CONFIG_P1014)
-       gd->sdhc_clk = gd->bus_clk;
+       gd->arch.sdhc_clk = gd->bus_clk;
 #else
-       gd->sdhc_clk = gd->bus_clk / 2;
+       gd->arch.sdhc_clk = gd->bus_clk / 2;
 #endif
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
index ea675373c1007963615af3b729d9b07e275855b6..9bf18fb8acb5a49b8ed4a6611c2b2c7091bf08d6 100644 (file)
@@ -29,6 +29,9 @@
 
 /* Architecture-specific global data */
 struct arch_global_data {
+#if defined(CONFIG_FSL_ESDHC)
+       u32 sdhc_clk;
+#endif
 #if defined(CONFIG_8xx)
        unsigned long brg_clk;
 #endif
@@ -150,9 +153,6 @@ typedef     struct  global_data {
        /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
        unsigned long pci_clk;
        unsigned long   mem_clk;
-#if defined(CONFIG_FSL_ESDHC)
-       u32 sdhc_clk;
-#endif
        phys_size_t     ram_size;       /* RAM size */
        unsigned long   env_addr;       /* Address  of Environment struct       */
        unsigned long   env_valid;      /* Checksum of Environment valid?       */
index 3d5c9c0f77ef9f3910590c7a36212675d2b17b56..b90f3e77698636a1fff74d01e930fa4d355e7468 100644 (file)
@@ -583,7 +583,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
                mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
        mmc->f_min = 400000;
-       mmc->f_max = MIN(gd->sdhc_clk, 52000000);
+       mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
 
        mmc->b_max = 0;
        mmc_register(mmc);
@@ -598,7 +598,7 @@ int fsl_esdhc_mmc_init(bd_t *bis)
        cfg = malloc(sizeof(struct fsl_esdhc_cfg));
        memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
        cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
-       cfg->sdhc_clk = gd->sdhc_clk;
+       cfg->sdhc_clk = gd->arch.sdhc_clk;
        return fsl_esdhc_initialize(bis, cfg);
 }
 
@@ -616,7 +616,7 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
 #endif
 
        do_fixup_by_compat_u32(blob, compat, "clock-frequency",
-                              gd->sdhc_clk, 1);
+                              gd->arch.sdhc_clk, 1);
 
        do_fixup_by_compat(blob, compat, "status", "okay",
                           4 + 1, 1);