]> git.sur5r.net Git - u-boot/commitdiff
am437x_epos_evm: add SPL API, QSPI, and serial flash support
authorSourav Poddar <sourav.poddar@ti.com>
Sat, 21 Dec 2013 07:20:08 +0000 (12:50 +0530)
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tue, 18 Feb 2014 17:11:09 +0000 (22:41 +0530)
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
board/ti/am43xx/mux.c
include/configs/am43xx_evm.h

index 810b1941db9d052321e79bd9987d48d1ad143661..f96c56f886596fde35e2e7ecf26c99d307bc55bb 100644 (file)
@@ -38,6 +38,16 @@ static struct module_pin_mux gpio0_22_pin_mux[] = {
        {-1},
 };
 
+static struct module_pin_mux qspi_pin_mux[] = {
+       {OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */
+       {OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */
+       {OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */
+       {OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */
+       {OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */
+       {OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */
+       {-1},
+};
+
 void enable_uart0_pin_mux(void)
 {
        configure_module_pin_mux(uart0_pin_mux);
@@ -50,6 +60,7 @@ void enable_board_pin_mux(void)
 
        if (board_is_gpevm())
                configure_module_pin_mux(gpio0_22_pin_mux);
+       configure_module_pin_mux(qspi_pin_mux);
 }
 
 void enable_i2c0_pin_mux(void)
index f45deeb351c64a217aecced9a81ed6acb10a297e..bef46bd14fbd74a9342c60944e50c9fc437bfb7f 100644 (file)
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_AM437X_USB2PHY2_HOST
 
+/* SPI */
+#undef CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_TI_SPI_MMAP
+#define CONFIG_QSPI_SEL_GPIO                   48
+#define CONFIG_SF_DEFAULT_SPEED                48000000
+#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS             0
+#define CONFIG_SPL_SPI_CS              0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
+
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x80200000\0" \