Zynq setups some default options for SPL but not all targets are
enabling SPL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
select CPU_V7
select SUPPORT_SPL
select OF_CONTROL
- select SPL_OF_CONTROL
+ select SPL_OF_CONTROL if SPL
select DM
select DM_ETH
- select SPL_DM
+ select SPL_DM if SPL
select DM_MMC
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
- select SPL_SEPARATE_BSS
+ select SPL_SEPARATE_BSS if SPL
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"