powerpc/85xx: Rename MPC8572 DDR erratum to DDR115

Use unique erratum number instead of platform number.
Enable command that reports errata on MPC8572DS.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 4f8134bef5e30e27b37facbe0e0fb298c0bd43f9..3f139c7d9ec0ef213f2423ea54b8fd59187e95f8 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -74,7 +74,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003
        puts("Work-around for Erratum DDR-A003 enabled\n");
 #endif
-
+#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115
+       puts("Work-around for Erratum DDR115 enabled\n");
+#endif
        return 0;
 }
 

diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
index b9502f7fed1bbc87e3ca18d5c1bda24b4168c3fa..35997f2d022d4ece32cf3c005a5f1d12e3f1d2c6 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c
@@ -178,7 +178,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
         * when operatiing in 32-bit bus mode with 4-beat bursts,
         * This erratum does not affect DDR3 mode, only for DDR2 mode.
         */
-#ifdef CONFIG_MPC8572
+#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115
        if ((((in_be32(&ddr->sdram_cfg) >> 24) & 0x7) == SDRAM_TYPE_DDR2)
            && in_be32(&ddr->sdram_cfg) & 0x80000) {
                /* set DEBUG_1[31] */

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index c771a4b61dc11cad2e8a97634e818aabf7d204aa..a1a3d6b949628d7ffa0106deee440fa87b5ccdbe 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -77,6 +77,7 @@
 #define CONFIG_MAX_CPUS                        2
 #define CONFIG_SYS_FSL_NUM_LAWS                12
 #define CONFIG_SYS_FSL_SEC_COMPAT      2
+#define CONFIG_SYS_FSL_ERRATUM_DDR_115
 
 #elif defined(CONFIG_P1010)
 #define CONFIG_MAX_CPUS                        1