TASREG MCF5249
+Jens Scharsig <esw@bus-elektronik.de>
+
+ eb_cpu5282 mfc5282
+
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
M52277EVB mcf5227x
+++ /dev/null
-/*
- * (C) Copyright 2005-2009
- * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include "asm/m5282.h"
-#include <bmp_layout.h>
-#include <status_led.h>
-#include <bus_vcxk.h>
-
-/*---------------------------------------------------------------------------*/
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned long display_width;
-unsigned long display_height;
-
-/*---------------------------------------------------------------------------*/
-
-int checkboard (void)
-{
- puts ("Board: MCF-EV1 + MCF-EV23 (BuS Elektronik GmbH & Co. KG)\n");
-#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
- puts (" Boot from Internal FLASH\n");
-#endif
-
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
- int size, i;
-
- size = 0;
- MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
- | MCFSDRAMC_DCR_RC ((15 * CONFIG_SYS_CLK) >> 4);
-#ifdef CONFIG_SYS_SDRAM_BASE0
-
- MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE0)
- | MCFSDRAMC_DACR_CASL (1)
- | MCFSDRAMC_DACR_CBM (3)
- | MCFSDRAMC_DACR_PS_16;
-
- MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
-
- MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
-
- *(unsigned short *) (CONFIG_SYS_SDRAM_BASE0) = 0xA5A5;
- MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
- for (i = 0; i < 2000; i++)
- asm (" nop");
- mbar_writeLong (MCFSDRAMC_DACR0,
- mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
- *(unsigned int *) (CONFIG_SYS_SDRAM_BASE0 + 0x220) = 0xA5A5;
- size += CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-#endif
-#ifdef CONFIG_SYS_SDRAM_BASE1
- MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
- | MCFSDRAMC_DACR_CASL (1)
- | MCFSDRAMC_DACR_CBM (3)
- | MCFSDRAMC_DACR_PS_16;
-
- MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
-
- MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
-
- *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5;
- MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
-
- for (i = 0; i < 2000; i++)
- asm (" nop");
-
- MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
- *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
- size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024;
-#endif
- return size;
-}
-
-#if defined(CONFIG_SYS_DRAM_TEST)
-int testdram (void)
-{
- uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
- uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
- uint *p;
-
- printf("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf ("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- printf("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-int misc_init_r(void)
-{
-#ifdef CONFIG_HW_WATCHDOG
- hw_watchdog_init();
-#endif
-#ifndef CONFIG_VIDEO
- vcxk_init(16, 16);
-#endif
- return 1;
-}
-
-#if defined(CONFIG_VIDEO)
-
-/*
- ****h* EB+CPU5282-T1/drv_video_init
- * FUNCTION
- ***
- */
-
-int drv_video_init(void)
-{
- char *s;
- unsigned long splash;
-
- printf("Init Video as ");
-
- if ((s = getenv("displaywidth")) != NULL)
- display_width = simple_strtoul(s, NULL, 10);
- else
- display_width = 256;
-
- if ((s = getenv("displayheight")) != NULL)
- display_height = simple_strtoul(s, NULL, 10);
- else
- display_height = 256;
-
- printf("%lu x %lu pixel matrix\n", display_width, display_height);
-
- MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
- MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
-
- vcxk_init(display_width, display_height);
-
-#ifdef CONFIG_SPLASH_SCREEN
- if ((s = getenv("splashimage")) != NULL) {
- debug("use splashimage: %s\n", s);
- splash = simple_strtoul(s, NULL, 16);
- debug("use splashimage: %x\n", splash);
- vcxk_acknowledge_wait();
- video_display_bitmap(splash, 0, 0);
- }
-#endif
- return 0;
-}
-#endif
-
-/*---------------------------------------------------------------------------*/
-
-#ifdef CONFIG_VIDEO
-int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int rcode = 0;
- ulong side;
- ulong bright;
-
- switch (argc) {
- case 3:
- side = simple_strtoul(argv[1], NULL, 10);
- bright = simple_strtoul(argv[2], NULL, 10);
- if ((side >= 0) && (side <= 3) &&
- (bright >= 0) && (bright <= 1000)) {
- vcxk_setbrightness(side, bright);
- rcode = 0;
- } else {
- printf("parameters out of range\n");
- printf("Usage:\n%s\n", cmdtp->usage);
- rcode = 1;
- }
- break;
- default:
- printf("Usage:\n%s\n", cmdtp->usage);
- rcode = 1;
- break;
- }
- return rcode;
-}
-
-/*---------------------------------------------------------------------------*/
-
-U_BOOT_CMD(
- bright, 3, 0, do_brightness,
- "sets the display brightness\n",
- " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
-);
-
-#endif
-
-/* EOF EB+MCF-EV123.c */
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cfm_flash.o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-/*
- * Basic Flash Driver for Freescale MCF 5281/5282 internal FLASH
- *
- * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/m5282.h>
-#include "cfm_flash.h"
-
-#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
-
-#if (CONFIG_SYS_CLK>20000000)
- #define CFM_CLK (((long) CONFIG_SYS_CLK / (400000 * 8) + 1) | 0x40)
-#else
- #define CFM_CLK ((long) CONFIG_SYS_CLK / 400000 + 1)
-#endif
-
-#define cmf_backdoor_address(addr) (((addr) & 0x0007FFFF) | 0x04000000 | \
- (CONFIG_SYS_MBAR & 0xC0000000))
-
-void cfm_flash_print_info (flash_info_t * info)
-{
- printf ("Freescale: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FREESCALE_ID_MCF5281 & FLASH_TYPEMASK:
- printf ("MCF5281 internal FLASH\n");
- break;
- case FREESCALE_ID_MCF5282 & FLASH_TYPEMASK:
- printf ("MCF5282 internal FLASH\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-}
-
-void cfm_flash_init (flash_info_t * info)
-{
- int sector;
- ulong protection;
- MCFCFM_MCR = 0;
- MCFCFM_CLKD = CFM_CLK;
- debug ("CFM Clock divider: %ld (%d Hz @ %ld Hz)\n",CFM_CLK,\
- CONFIG_SYS_CLK / (2* ((CFM_CLK & 0x3F)+1) * (1+((CFM_CLK & 0x40)>>6)*7)),\
- CONFIG_SYS_CLK);
- MCFCFM_SACC = 0;
- MCFCFM_DACC = 0;
-
- if (MCFCFM_SEC & MCFCFM_SEC_KEYEN)
- puts("CFM backdoor access is enabled\n");
- if (MCFCFM_SEC & MCFCFM_SEC_SECSTAT)
- puts("CFM securety is enabled\n");
-
- #ifdef CONFIG_M5281
- info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
- (FREESCALE_ID_MCF5281 & FLASH_TYPEMASK);
- info->size = 256*1024;
- info->sector_count = 16;
- #else
- info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
- (FREESCALE_ID_MCF5282 & FLASH_TYPEMASK);
- info->size = 512*1024;
- info->sector_count = 32;
- #endif
- protection = MCFCFM_PROT;
- for (sector = 0; sector < info->sector_count; sector++)
- {
- if (sector == 0)
- {
- info->start[sector] = CONFIG_SYS_INT_FLASH_BASE;
- }
- else
- {
- info->start[sector] = info->start[sector-1] + 0x04000;
- }
- info->protect[sector] = protection & 1;
- protection >>= 1;
- }
-}
-
-int cfm_flash_readycheck(int checkblank)
-{
- int rc;
- unsigned char state;
-
- rc = ERR_OK;
- while (!(MCFCFM_USTAT & MCFCFM_USTAT_CCIF));
- state = MCFCFM_USTAT;
- if (state & MCFCFM_USTAT_ACCERR)
- {
- debug ("%s(): CFM access error",__FUNCTION__);
- rc = ERR_PROG_ERROR;
- }
- if (state & MCFCFM_USTAT_PVIOL)
- {
- debug ("%s(): CFM protection violation",__FUNCTION__);
- rc = ERR_PROTECTED;
- }
- if (checkblank)
- {
- if (!(state & MCFCFM_USTAT_BLANK))
- {
- debug ("%s(): CFM erras error",__FUNCTION__);
- rc = ERR_NOT_ERASED;
- }
- }
- MCFCFM_USTAT = state & 0x34; /* reset state */
- return rc;
-}
-
-/* Erase 16KiB = 8 2KiB pages */
-
-int cfm_flash_erase_sector (flash_info_t * info, int sector)
-{
- ulong address;
- int page;
- int rc;
- rc= ERR_OK;
- address = cmf_backdoor_address(info->start[sector]);
- for (page=0; (page<8) && (rc==ERR_OK); page++)
- {
- *(volatile __u32*) address = 0;
- MCFCFM_CMD = MCFCFM_CMD_PGERS;
- MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
- rc = cfm_flash_readycheck(0);
- if (rc==ERR_OK)
- {
- *(volatile __u32*) address = 0;
- MCFCFM_CMD = MCFCFM_CMD_PGERSVER;
- MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
- rc = cfm_flash_readycheck(1);
- }
- address += 0x800;
- }
- return rc;
-}
-
-int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
- ulong dest, data;
-
- rc = ERR_OK;
- if (addr & 3)
- {
- debug ("Byte and Word alignment not supported\n");
- rc = ERR_ALIGN;
- }
- if (cnt & 3)
- {
- debug ("Byte and Word transfer not supported\n");
- rc = ERR_ALIGN;
- }
- dest = cmf_backdoor_address(addr);
- while ((cnt>=4) && (rc == ERR_OK))
- {
- data = *((volatile u32 *) src);
- *(volatile u32*) dest = data;
- MCFCFM_CMD = MCFCFM_CMD_PGM;
- MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
- rc = cfm_flash_readycheck(0);
- if (*(volatile u32*) addr != data) rc = ERR_PROG_ERROR;
- src +=4;
- dest +=4;
- addr +=4;
- cnt -=4;
- }
- return rc;
-}
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-
-int cfm_flash_protect(flash_info_t * info,long sector,int prot)
-{
- int rc;
-
- rc= ERR_OK;
- if (prot)
- {
- MCFCFM_PROT |= (1<<sector);
- info->protect[sector]=1;
- }
- else
- {
- MCFCFM_PROT &= ~(1<<sector);
- info->protect[sector]=0;
- }
- return rc;
-}
-
-#endif
-
-#endif
+++ /dev/null
-/*
- * Basic Flash Driver for Freescale MCF 5282 internal FLASH
- *
- * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CFM_FLASH_H_
-#define __CFM_FLASH_H_
-
-#define FREESCALE_MANUFACT 0xFACFFACF
-#define FREESCALE_ID_MCF5281 0x5281
-#define FREESCALE_ID_MCF5282 0x5282
-
-extern void cfm_flash_print_info (flash_info_t * info);
-extern int cfm_flash_erase_sector (flash_info_t * info, int sector);
-extern void cfm_flash_init (flash_info_t * info);
-extern int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-extern int cfm_flash_protect(flash_info_t * info,long sector,int prot);
-#endif
-
-#endif
+++ /dev/null
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-ifndef CONFIG_SYS_TEXT_BASE
-CONFIG_SYS_TEXT_BASE = 0xFE000000
-endif
+++ /dev/null
-/*
- * (C) Copyright 2005
- * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * Based On
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "cfm_flash.h"
-
-#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
-#define FLASH_BANK_SIZE 0x200000
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV160B & FLASH_TYPEMASK):
- printf ("AM29LV160B (16Bit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
- break;
- case FREESCALE_MANUFACT & FLASH_VENDMASK:
- cfm_flash_print_info (info);
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- puts (" Size: ");
- if ((info->size >> 20) > 0)
- {
- printf ("%ld MiB",info->size >> 20);
- }
- else
- {
- printf ("%ld KiB",info->size >> 10);
- }
- printf (" in %d Sectors\n", info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 4) == 0) {
- printf ("\n ");
- }
- printf ("%02d: %08lX%s ", i,info->start[i],
- info->protect[i] ? " P" : " ");
- }
- printf ("\n\n");
-}
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- switch (i)
- {
- case 1:
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV160B & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- flashbase = PHYS_FLASH_1;
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j == 0) {
- /* 1st is 16 KiB */
- flash_info[i].start[j] = flashbase;
- }
- if ((j >= 1) && (j <= 2)) {
- /* 2nd and 3rd are 8 KiB */
- flash_info[i].start[j] =
- flashbase + 0x4000 + 0x2000 * (j - 1);
- }
- if (j == 3) {
- /* 4th is 32 KiB */
- flash_info[i].start[j] = flashbase + 0x8000;
- }
- if ((j >= 4) && (j <= 34)) {
- /* rest is 256 KiB */
- flash_info[i].start[j] =
- flashbase + 0x10000 + 0x10000 * (j - 4);
- }
- }
- break;
- case 0:
- cfm_flash_init (&flash_info[i]);
- break;
- default:
- panic ("configured to many flash banks!\n");
- }
-
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + 0xffff, &flash_info[0]);
-
- return size;
-}
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(info->start[0] + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(info->start[0] + (0x000002AA<<1)))
-
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define ERR_READY -1
-
-int amd_flash_erase_sector(flash_info_t * info, int sector)
-{
- int state;
- ulong result;
- ulong start;
-
- volatile u16 *addr =
- (volatile u16 *) (info->start[sector]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- state = 0;
- start = get_timer(0);
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- state = ERR_TIMOUT;
- }
-
- if (!state && (result & 0xFFFF) & BIT_ERASE_DONE)
- state = ERR_READY;
- }
- while (!state);
- if (state == ERR_READY)
- state = ERR_OK;
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- return state;
-}
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int iflag, cflag;
- int sector;
- int rc;
-
- rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- {
- rc = ERR_UNKNOWN_FLASH_TYPE;
- } /* (info->flash_id == FLASH_UNKNOWN) */
-
- if ((s_first < 0) || (s_first > s_last) || s_last >= info->sector_count)
- {
- rc = ERR_INVAL;
- }
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- for (sector = s_first; (sector <= s_last) && (rc == ERR_OK); sector++) {
-
- if (info->protect[sector])
- {
- putc('P'); /* protected sector will not erase */
- }
- else
- {
- /* erase on unprotected sector */
- puts("E\b");
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- rc = amd_flash_erase_sector(info,sector);
- break;
- case (FREESCALE_MANUFACT & FLASH_VENDMASK):
- rc = cfm_flash_erase_sector(info,sector);
- break;
- default:
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
- putc('.');
- }
- }
- if (rc!=ERR_OK)
- {
- printf ("\n ");
- flash_perror (rc);
- }
- else
- {
- printf (" done\n");
- }
-
- udelay (10000); /* allow flash to settle - wait 10 ms */
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data)
-{
- volatile u16 *addr;
- ulong result;
- int cflag, iflag;
- int state;
- ulong start;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- addr = (volatile u16 *) dest;
-
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait until flash is ready */
- state = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- state = ERR_TIMOUT;
- }
- if (!state && ((result & BIT_RDY_MASK) == (data & BIT_RDY_MASK)))
- state = ERR_READY;
-
- } while (!state);
-
- *addr = CMD_READ_ARRAY;
-
- if (state == ERR_READY)
- state = ERR_OK;
- if ((*addr != data) && (state != ERR_TIMOUT))
- state = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return state;
-}
-
-int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
- ulong dest;
- u16 data;
-
- rc = ERR_OK;
- if (addr & 1)
- {
- debug ("Byte alignment not supported\n");
- rc = ERR_ALIGN;
- }
- if (cnt & 1)
- {
- debug ("Byte transfer not supported\n");
- rc = ERR_ALIGN;
- }
-
- dest = addr;
- while ((cnt>=2) && (rc == ERR_OK))
- {
- data = *((volatile u16 *) src);
- rc=amd_write_word (info,dest,data);
- src +=2;
- dest +=2;
- cnt -=2;
- }
- return rc;
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- rc = amd_flash_write_buff(info,src,addr,cnt);
- break;
- case (FREESCALE_MANUFACT & FLASH_VENDMASK):
- rc = cfm_flash_write_buff(info,src,addr,cnt);
- break;
- default:
- rc = ERR_UNKNOWN_FLASH_VENDOR;
- }
- return rc;
-
-}
-int amd_flash_protect(flash_info_t * info,long sector,int prot)
-{
- int rc;
- rc= ERR_OK;
- if (prot)
- {
- info->protect[sector]=1;
- }
- else
- {
- info->protect[sector]=0;
- }
- return rc;
-}
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-
-int flash_real_protect(flash_info_t * info,long sector,int prot)
-{
- int rc;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- rc = amd_flash_protect(info,sector,prot);
- break;
- case (FREESCALE_MANUFACT & FLASH_VENDMASK):
- rc = cfm_flash_protect(info,sector,prot);
- break;
- default:
- rc = ERR_UNKNOWN_FLASH_VENDOR;
- }
- return rc;
-}
-
-#endif
+++ /dev/null
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-
-SECTIONS
-{
- .text :
- {
- arch/m68k/cpu/mcf52x2/start.o (.text*)
-
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
-
- .reloc :
- {
- __got_start = .;
- KEEP(*(.got))
- __got_end = .;
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- _sbss = .;
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- _ebss = .;
- }
- __bss_end__ = . ;
- PROVIDE (end = .);
-}
--- /dev/null
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS = $(BOARD).o cfm_flash.o flash.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+/*
+ * Basic Flash Driver for Freescale MCF 5281/5282 internal FLASH
+ *
+ * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/m5282.h>
+#include "cfm_flash.h"
+
+#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
+
+#if (CONFIG_SYS_CLK>20000000)
+ #define CFM_CLK (((long) CONFIG_SYS_CLK / (400000 * 8) + 1) | 0x40)
+#else
+ #define CFM_CLK ((long) CONFIG_SYS_CLK / 400000 + 1)
+#endif
+
+#define cmf_backdoor_address(addr) (((addr) & 0x0007FFFF) | 0x04000000 | \
+ (CONFIG_SYS_MBAR & 0xC0000000))
+
+void cfm_flash_print_info (flash_info_t * info)
+{
+ printf ("Freescale: ");
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FREESCALE_ID_MCF5281 & FLASH_TYPEMASK:
+ printf ("MCF5281 internal FLASH\n");
+ break;
+ case FREESCALE_ID_MCF5282 & FLASH_TYPEMASK:
+ printf ("MCF5282 internal FLASH\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+}
+
+void cfm_flash_init (flash_info_t * info)
+{
+ int sector;
+ ulong protection;
+ MCFCFM_MCR = 0;
+ MCFCFM_CLKD = CFM_CLK;
+ debug ("CFM Clock divider: %ld (%d Hz @ %ld Hz)\n",CFM_CLK,\
+ CONFIG_SYS_CLK / (2* ((CFM_CLK & 0x3F)+1) * (1+((CFM_CLK & 0x40)>>6)*7)),\
+ CONFIG_SYS_CLK);
+ MCFCFM_SACC = 0;
+ MCFCFM_DACC = 0;
+
+ if (MCFCFM_SEC & MCFCFM_SEC_KEYEN)
+ puts("CFM backdoor access is enabled\n");
+ if (MCFCFM_SEC & MCFCFM_SEC_SECSTAT)
+ puts("CFM securety is enabled\n");
+
+ #ifdef CONFIG_M5281
+ info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
+ (FREESCALE_ID_MCF5281 & FLASH_TYPEMASK);
+ info->size = 256*1024;
+ info->sector_count = 16;
+ #else
+ info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
+ (FREESCALE_ID_MCF5282 & FLASH_TYPEMASK);
+ info->size = 512*1024;
+ info->sector_count = 32;
+ #endif
+ protection = MCFCFM_PROT;
+ for (sector = 0; sector < info->sector_count; sector++)
+ {
+ if (sector == 0)
+ {
+ info->start[sector] = CONFIG_SYS_INT_FLASH_BASE;
+ }
+ else
+ {
+ info->start[sector] = info->start[sector-1] + 0x04000;
+ }
+ info->protect[sector] = protection & 1;
+ protection >>= 1;
+ }
+}
+
+int cfm_flash_readycheck(int checkblank)
+{
+ int rc;
+ unsigned char state;
+
+ rc = ERR_OK;
+ while (!(MCFCFM_USTAT & MCFCFM_USTAT_CCIF));
+ state = MCFCFM_USTAT;
+ if (state & MCFCFM_USTAT_ACCERR)
+ {
+ debug ("%s(): CFM access error",__FUNCTION__);
+ rc = ERR_PROG_ERROR;
+ }
+ if (state & MCFCFM_USTAT_PVIOL)
+ {
+ debug ("%s(): CFM protection violation",__FUNCTION__);
+ rc = ERR_PROTECTED;
+ }
+ if (checkblank)
+ {
+ if (!(state & MCFCFM_USTAT_BLANK))
+ {
+ debug ("%s(): CFM erras error",__FUNCTION__);
+ rc = ERR_NOT_ERASED;
+ }
+ }
+ MCFCFM_USTAT = state & 0x34; /* reset state */
+ return rc;
+}
+
+/* Erase 16KiB = 8 2KiB pages */
+
+int cfm_flash_erase_sector (flash_info_t * info, int sector)
+{
+ ulong address;
+ int page;
+ int rc;
+ rc= ERR_OK;
+ address = cmf_backdoor_address(info->start[sector]);
+ for (page=0; (page<8) && (rc==ERR_OK); page++)
+ {
+ *(volatile __u32*) address = 0;
+ MCFCFM_CMD = MCFCFM_CMD_PGERS;
+ MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
+ rc = cfm_flash_readycheck(0);
+ if (rc==ERR_OK)
+ {
+ *(volatile __u32*) address = 0;
+ MCFCFM_CMD = MCFCFM_CMD_PGERSVER;
+ MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
+ rc = cfm_flash_readycheck(1);
+ }
+ address += 0x800;
+ }
+ return rc;
+}
+
+int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ int rc;
+ ulong dest, data;
+
+ rc = ERR_OK;
+ if (addr & 3)
+ {
+ debug ("Byte and Word alignment not supported\n");
+ rc = ERR_ALIGN;
+ }
+ if (cnt & 3)
+ {
+ debug ("Byte and Word transfer not supported\n");
+ rc = ERR_ALIGN;
+ }
+ dest = cmf_backdoor_address(addr);
+ while ((cnt>=4) && (rc == ERR_OK))
+ {
+ data = *((volatile u32 *) src);
+ *(volatile u32*) dest = data;
+ MCFCFM_CMD = MCFCFM_CMD_PGM;
+ MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
+ rc = cfm_flash_readycheck(0);
+ if (*(volatile u32*) addr != data) rc = ERR_PROG_ERROR;
+ src +=4;
+ dest +=4;
+ addr +=4;
+ cnt -=4;
+ }
+ return rc;
+}
+
+#ifdef CONFIG_SYS_FLASH_PROTECTION
+
+int cfm_flash_protect(flash_info_t * info,long sector,int prot)
+{
+ int rc;
+
+ rc= ERR_OK;
+ if (prot)
+ {
+ MCFCFM_PROT |= (1<<sector);
+ info->protect[sector]=1;
+ }
+ else
+ {
+ MCFCFM_PROT &= ~(1<<sector);
+ info->protect[sector]=0;
+ }
+ return rc;
+}
+
+#endif
+
+#endif
--- /dev/null
+/*
+ * Basic Flash Driver for Freescale MCF 5282 internal FLASH
+ *
+ * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CFM_FLASH_H_
+#define __CFM_FLASH_H_
+
+#define FREESCALE_MANUFACT 0xFACFFACF
+#define FREESCALE_ID_MCF5281 0x5281
+#define FREESCALE_ID_MCF5282 0x5282
+
+extern void cfm_flash_print_info (flash_info_t * info);
+extern int cfm_flash_erase_sector (flash_info_t * info, int sector);
+extern void cfm_flash_init (flash_info_t * info);
+extern int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
+#ifdef CONFIG_SYS_FLASH_PROTECTION
+extern int cfm_flash_protect(flash_info_t * info,long sector,int prot);
+#endif
+
+#endif
--- /dev/null
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+ifndef CONFIG_SYS_TEXT_BASE
+CONFIG_SYS_TEXT_BASE = 0xFE000000
+endif
--- /dev/null
+/*
+ * (C) Copyright 2005-2009
+ * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include "asm/m5282.h"
+#include <bmp_layout.h>
+#include <status_led.h>
+#include <bus_vcxk.h>
+
+/*---------------------------------------------------------------------------*/
+
+DECLARE_GLOBAL_DATA_PTR;
+
+unsigned long display_width;
+unsigned long display_height;
+
+/*---------------------------------------------------------------------------*/
+
+int checkboard (void)
+{
+ puts ("Board: MCF-EV1 + MCF-EV23 (BuS Elektronik GmbH & Co. KG)\n");
+#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
+ puts (" Boot from Internal FLASH\n");
+#endif
+
+ return 0;
+}
+
+phys_size_t initdram (int board_type)
+{
+ int size, i;
+
+ size = 0;
+ MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
+ | MCFSDRAMC_DCR_RC ((15 * CONFIG_SYS_CLK) >> 4);
+#ifdef CONFIG_SYS_SDRAM_BASE0
+
+ MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE0)
+ | MCFSDRAMC_DACR_CASL (1)
+ | MCFSDRAMC_DACR_CBM (3)
+ | MCFSDRAMC_DACR_PS_16;
+
+ MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
+
+ *(unsigned short *) (CONFIG_SYS_SDRAM_BASE0) = 0xA5A5;
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
+ for (i = 0; i < 2000; i++)
+ asm (" nop");
+ mbar_writeLong (MCFSDRAMC_DACR0,
+ mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
+ *(unsigned int *) (CONFIG_SYS_SDRAM_BASE0 + 0x220) = 0xA5A5;
+ size += CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+#endif
+#ifdef CONFIG_SYS_SDRAM_BASE1
+ MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
+ | MCFSDRAMC_DACR_CASL (1)
+ | MCFSDRAMC_DACR_CBM (3)
+ | MCFSDRAMC_DACR_PS_16;
+
+ MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+
+ MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
+
+ *(unsigned short *) (CONFIG_SYS_SDRAM_BASE1) = 0xA5A5;
+ MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
+
+ for (i = 0; i < 2000; i++)
+ asm (" nop");
+
+ MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
+ *(unsigned int *) (CONFIG_SYS_SDRAM_BASE1 + 0x220) = 0xA5A5;
+ size += CONFIG_SYS_SDRAM_SIZE1 * 1024 * 1024;
+#endif
+ return size;
+}
+
+#if defined(CONFIG_SYS_DRAM_TEST)
+int testdram (void)
+{
+ uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
+ uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
+ uint *p;
+
+ printf("SDRAM test phase 1:\n");
+ for (p = pstart; p < pend; p++)
+ *p = 0xaaaaaaaa;
+
+ for (p = pstart; p < pend; p++) {
+ if (*p != 0xaaaaaaaa) {
+ printf ("SDRAM test fails at: %08x\n", (uint) p);
+ return 1;
+ }
+ }
+
+ printf("SDRAM test phase 2:\n");
+ for (p = pstart; p < pend; p++)
+ *p = 0x55555555;
+
+ for (p = pstart; p < pend; p++) {
+ if (*p != 0x55555555) {
+ printf ("SDRAM test fails at: %08x\n", (uint) p);
+ return 1;
+ }
+ }
+
+ printf("SDRAM test passed.\n");
+ return 0;
+}
+#endif
+
+int misc_init_r(void)
+{
+#ifdef CONFIG_HW_WATCHDOG
+ hw_watchdog_init();
+#endif
+#ifndef CONFIG_VIDEO
+ vcxk_init(16, 16);
+#endif
+ return 1;
+}
+
+#if defined(CONFIG_VIDEO)
+
+/*
+ ****h* EB+CPU5282-T1/drv_video_init
+ * FUNCTION
+ ***
+ */
+
+int drv_video_init(void)
+{
+ char *s;
+ unsigned long splash;
+
+ printf("Init Video as ");
+
+ if ((s = getenv("displaywidth")) != NULL)
+ display_width = simple_strtoul(s, NULL, 10);
+ else
+ display_width = 256;
+
+ if ((s = getenv("displayheight")) != NULL)
+ display_height = simple_strtoul(s, NULL, 10);
+ else
+ display_height = 256;
+
+ printf("%lu x %lu pixel matrix\n", display_width, display_height);
+
+ MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
+ MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
+
+ vcxk_init(display_width, display_height);
+
+#ifdef CONFIG_SPLASH_SCREEN
+ if ((s = getenv("splashimage")) != NULL) {
+ debug("use splashimage: %s\n", s);
+ splash = simple_strtoul(s, NULL, 16);
+ debug("use splashimage: %x\n", splash);
+ vcxk_acknowledge_wait();
+ video_display_bitmap(splash, 0, 0);
+ }
+#endif
+ return 0;
+}
+#endif
+
+/*---------------------------------------------------------------------------*/
+
+#ifdef CONFIG_VIDEO
+int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int rcode = 0;
+ ulong side;
+ ulong bright;
+
+ switch (argc) {
+ case 3:
+ side = simple_strtoul(argv[1], NULL, 10);
+ bright = simple_strtoul(argv[2], NULL, 10);
+ if ((side >= 0) && (side <= 3) &&
+ (bright >= 0) && (bright <= 1000)) {
+ vcxk_setbrightness(side, bright);
+ rcode = 0;
+ } else {
+ printf("parameters out of range\n");
+ printf("Usage:\n%s\n", cmdtp->usage);
+ rcode = 1;
+ }
+ break;
+ default:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ rcode = 1;
+ break;
+ }
+ return rcode;
+}
+
+/*---------------------------------------------------------------------------*/
+
+U_BOOT_CMD(
+ bright, 3, 0, do_brightness,
+ "sets the display brightness\n",
+ " <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
+);
+
+#endif
+
+/* EOF EB+MCF-EV123.c */
--- /dev/null
+/*
+ * (C) Copyright 2005
+ * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * Based On
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include "cfm_flash.h"
+
+#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
+#define FLASH_BANK_SIZE 0x200000
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case (AMD_MANUFACT & FLASH_VENDMASK):
+ printf ("AMD: ");
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case (AMD_ID_LV160B & FLASH_TYPEMASK):
+ printf ("AM29LV160B (16Bit)\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+ break;
+ case FREESCALE_MANUFACT & FLASH_VENDMASK:
+ cfm_flash_print_info (info);
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ puts (" Size: ");
+ if ((info->size >> 20) > 0)
+ {
+ printf ("%ld MiB",info->size >> 20);
+ }
+ else
+ {
+ printf ("%ld KiB",info->size >> 10);
+ }
+ printf (" in %d Sectors\n", info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; i++) {
+ if ((i % 4) == 0) {
+ printf ("\n ");
+ }
+ printf ("%02d: %08lX%s ", i,info->start[i],
+ info->protect[i] ? " P" : " ");
+ }
+ printf ("\n\n");
+}
+
+unsigned long flash_init (void)
+{
+ int i, j;
+ ulong size = 0;
+
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
+ ulong flashbase = 0;
+
+ switch (i)
+ {
+ case 1:
+ flash_info[i].flash_id =
+ (AMD_MANUFACT & FLASH_VENDMASK) |
+ (AMD_ID_LV160B & FLASH_TYPEMASK);
+ flash_info[i].size = FLASH_BANK_SIZE;
+ flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+ memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
+ flashbase = PHYS_FLASH_1;
+ for (j = 0; j < flash_info[i].sector_count; j++) {
+ if (j == 0) {
+ /* 1st is 16 KiB */
+ flash_info[i].start[j] = flashbase;
+ }
+ if ((j >= 1) && (j <= 2)) {
+ /* 2nd and 3rd are 8 KiB */
+ flash_info[i].start[j] =
+ flashbase + 0x4000 + 0x2000 * (j - 1);
+ }
+ if (j == 3) {
+ /* 4th is 32 KiB */
+ flash_info[i].start[j] = flashbase + 0x8000;
+ }
+ if ((j >= 4) && (j <= 34)) {
+ /* rest is 256 KiB */
+ flash_info[i].start[j] =
+ flashbase + 0x10000 + 0x10000 * (j - 4);
+ }
+ }
+ break;
+ case 0:
+ cfm_flash_init (&flash_info[i]);
+ break;
+ default:
+ panic ("configured to many flash banks!\n");
+ }
+
+ size += flash_info[i].size;
+ }
+
+ flash_protect (FLAG_PROTECT_SET,
+ CONFIG_SYS_FLASH_BASE,
+ CONFIG_SYS_FLASH_BASE + 0xffff, &flash_info[0]);
+
+ return size;
+}
+
+#define CMD_READ_ARRAY 0x00F0
+#define CMD_UNLOCK1 0x00AA
+#define CMD_UNLOCK2 0x0055
+#define CMD_ERASE_SETUP 0x0080
+#define CMD_ERASE_CONFIRM 0x0030
+#define CMD_PROGRAM 0x00A0
+#define CMD_UNLOCK_BYPASS 0x0020
+
+#define MEM_FLASH_ADDR1 (*(volatile u16 *)(info->start[0] + (0x00000555<<1)))
+#define MEM_FLASH_ADDR2 (*(volatile u16 *)(info->start[0] + (0x000002AA<<1)))
+
+
+#define BIT_ERASE_DONE 0x0080
+#define BIT_RDY_MASK 0x0080
+#define BIT_PROGRAM_ERROR 0x0020
+#define BIT_TIMEOUT 0x80000000 /* our flag */
+
+#define ERR_READY -1
+
+int amd_flash_erase_sector(flash_info_t * info, int sector)
+{
+ int state;
+ ulong result;
+ ulong start;
+
+ volatile u16 *addr =
+ (volatile u16 *) (info->start[sector]);
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ *addr = CMD_ERASE_CONFIRM;
+
+ /* wait until flash is ready */
+ state = 0;
+ start = get_timer(0);
+
+ do {
+ result = *addr;
+
+ /* check timeout */
+ if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+ state = ERR_TIMOUT;
+ }
+
+ if (!state && (result & 0xFFFF) & BIT_ERASE_DONE)
+ state = ERR_READY;
+ }
+ while (!state);
+ if (state == ERR_READY)
+ state = ERR_OK;
+
+ MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
+
+ return state;
+}
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ int iflag, cflag;
+ int sector;
+ int rc;
+
+ rc = ERR_OK;
+
+ if (info->flash_id == FLASH_UNKNOWN)
+ {
+ rc = ERR_UNKNOWN_FLASH_TYPE;
+ } /* (info->flash_id == FLASH_UNKNOWN) */
+
+ if ((s_first < 0) || (s_first > s_last) || s_last >= info->sector_count)
+ {
+ rc = ERR_INVAL;
+ }
+
+ cflag = icache_status ();
+ icache_disable ();
+ iflag = disable_interrupts ();
+
+ for (sector = s_first; (sector <= s_last) && (rc == ERR_OK); sector++) {
+
+ if (info->protect[sector])
+ {
+ putc('P'); /* protected sector will not erase */
+ }
+ else
+ {
+ /* erase on unprotected sector */
+ puts("E\b");
+ switch (info->flash_id & FLASH_VENDMASK)
+ {
+ case (AMD_MANUFACT & FLASH_VENDMASK):
+ rc = amd_flash_erase_sector(info,sector);
+ break;
+ case (FREESCALE_MANUFACT & FLASH_VENDMASK):
+ rc = cfm_flash_erase_sector(info,sector);
+ break;
+ default:
+ return ERR_UNKNOWN_FLASH_VENDOR;
+ }
+ putc('.');
+ }
+ }
+ if (rc!=ERR_OK)
+ {
+ printf ("\n ");
+ flash_perror (rc);
+ }
+ else
+ {
+ printf (" done\n");
+ }
+
+ udelay (10000); /* allow flash to settle - wait 10 ms */
+
+ if (iflag)
+ enable_interrupts ();
+
+ if (cflag)
+ icache_enable ();
+
+ return rc;
+}
+
+volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data)
+{
+ volatile u16 *addr;
+ ulong result;
+ int cflag, iflag;
+ int state;
+ ulong start;
+
+ /*
+ * Check if Flash is (sufficiently) erased
+ */
+ addr = (volatile u16 *) dest;
+
+ result = *addr;
+ if ((result & data) != data)
+ return ERR_NOT_ERASED;
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+
+ cflag = icache_status ();
+ icache_disable ();
+ iflag = disable_interrupts ();
+
+ MEM_FLASH_ADDR1 = CMD_UNLOCK1;
+ MEM_FLASH_ADDR2 = CMD_UNLOCK2;
+ MEM_FLASH_ADDR1 = CMD_PROGRAM;
+ *addr = data;
+
+ /* arm simple, non interrupt dependent timer */
+ start = get_timer(0);
+
+ /* wait until flash is ready */
+ state = 0;
+ do {
+ result = *addr;
+
+ /* check timeout */
+ if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+ state = ERR_TIMOUT;
+ }
+ if (!state && ((result & BIT_RDY_MASK) == (data & BIT_RDY_MASK)))
+ state = ERR_READY;
+
+ } while (!state);
+
+ *addr = CMD_READ_ARRAY;
+
+ if (state == ERR_READY)
+ state = ERR_OK;
+ if ((*addr != data) && (state != ERR_TIMOUT))
+ state = ERR_PROG_ERROR;
+
+ if (iflag)
+ enable_interrupts ();
+
+ if (cflag)
+ icache_enable ();
+
+ return state;
+}
+
+int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ int rc;
+ ulong dest;
+ u16 data;
+
+ rc = ERR_OK;
+ if (addr & 1)
+ {
+ debug ("Byte alignment not supported\n");
+ rc = ERR_ALIGN;
+ }
+ if (cnt & 1)
+ {
+ debug ("Byte transfer not supported\n");
+ rc = ERR_ALIGN;
+ }
+
+ dest = addr;
+ while ((cnt>=2) && (rc == ERR_OK))
+ {
+ data = *((volatile u16 *) src);
+ rc=amd_write_word (info,dest,data);
+ src +=2;
+ dest +=2;
+ cnt -=2;
+ }
+ return rc;
+}
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ int rc;
+
+ switch (info->flash_id & FLASH_VENDMASK)
+ {
+ case (AMD_MANUFACT & FLASH_VENDMASK):
+ rc = amd_flash_write_buff(info,src,addr,cnt);
+ break;
+ case (FREESCALE_MANUFACT & FLASH_VENDMASK):
+ rc = cfm_flash_write_buff(info,src,addr,cnt);
+ break;
+ default:
+ rc = ERR_UNKNOWN_FLASH_VENDOR;
+ }
+ return rc;
+
+}
+int amd_flash_protect(flash_info_t * info,long sector,int prot)
+{
+ int rc;
+ rc= ERR_OK;
+ if (prot)
+ {
+ info->protect[sector]=1;
+ }
+ else
+ {
+ info->protect[sector]=0;
+ }
+ return rc;
+}
+
+#ifdef CONFIG_SYS_FLASH_PROTECTION
+
+int flash_real_protect(flash_info_t * info,long sector,int prot)
+{
+ int rc;
+
+ switch (info->flash_id & FLASH_VENDMASK)
+ {
+ case (AMD_MANUFACT & FLASH_VENDMASK):
+ rc = amd_flash_protect(info,sector,prot);
+ break;
+ case (FREESCALE_MANUFACT & FLASH_VENDMASK):
+ rc = cfm_flash_protect(info,sector,prot);
+ break;
+ default:
+ rc = ERR_UNKNOWN_FLASH_VENDOR;
+ }
+ return rc;
+}
+
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+
+SECTIONS
+{
+ .text :
+ {
+ arch/m68k/cpu/mcf52x2/start.o (.text*)
+
+ *(.text*)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+ }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ KEEP(*(.got))
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ KEEP(*(.got2))
+ _FIXUP_TABLE_ = .;
+ KEEP(*(.fixup))
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data*)
+ *(.sdata*)
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss (NOLOAD) :
+ {
+ _sbss = .;
+ *(.bss*)
+ *(.sbss*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ __bss_end__ = . ;
+ PROVIDE (end = .);
+}
M5235EVB_Flash32 m68k mcf523x m5235evb freescale - M5235EVB:NORFLASH_PS32BIT,SYS_TEXT_BASE=0xFFC00000
cobra5272 m68k mcf52x2 cobra5272 -
idmr m68k mcf52x2
-EB-MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS - EB+MCF-EV123:SYS_TEXT_BASE=0xFFE00000
-EB-MCF-EV123_internal m68k mcf52x2 EB+MCF-EV123 BuS - EB+MCF-EV123:SYS_TEXT_BASE=0xF0000000
+eb_cpu5282 m68k mcf52x2 eb_cpu5282 BuS - eb_cpu5282:SYS_TEXT_BASE=0xFFE00000
+eb_cpu5282_internal m68k mcf52x2 eb_cpu5282 BuS - eb_cpu5282:SYS_TEXT_BASE=0xF0000000
TASREG m68k mcf52x2 tasreg esd
M5208EVBE m68k mcf52x2 m5208evbe freescale
M5249EVB m68k mcf52x2 m5249evb freescale
+++ /dev/null
-/*
- * Configuation settings for the BuS EB+MCF-EV123 boards.
- *
- * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _CONFIG_EB_MCF_EV123_H_
-#define _CONFIG_EB_MCF_EV123_H_
-
-#undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP
-
-/*----------------------------------------------------------------------*
- * High Level Configuration Options (easy to change) *
- *----------------------------------------------------------------------*/
-
-#define CONFIG_MCF52x2 /* define processor family */
-#define CONFIG_M5282 /* define processor type */
-#define CONFIG_EB_MCF_EV123
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_MCFUART
-#define CONFIG_SYS_UART_PORT (0)
-#define CONFIG_BAUDRATE 9600
-
-#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
-
-#define CONFIG_BOOTCOMMAND "printenv"
-
-/*----------------------------------------------------------------------*
- * Options *
- *----------------------------------------------------------------------*/
-
-#define CONFIG_BOOT_RETRY_TIME -1
-#define CONFIG_RESET_TO_RETRY
-#define CONFIG_SPLASH_SCREEN
-
-/*----------------------------------------------------------------------*
- * Configuration for environment *
- * Environment is in the second sector of the first 256k of flash *
- *----------------------------------------------------------------------*/
-
-#ifndef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
-#define CONFIG_ENV_SECT_SIZE 0x4000
-#define CONFIG_ENV_IS_IN_FLASH 1
-#else
-#define CONFIG_ENV_ADDR 0xFFE04000
-#define CONFIG_ENV_SECT_SIZE 0x2000
-#define CONFIG_ENV_IS_IN_FLASH 1
-#endif
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_LOADB
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-
-#define CONFIG_MCFTMR
-
-
-#define CONFIG_BOOTDELAY 5
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT "\nEV123 U-Boot> "
-#define CONFIG_SYS_LONGHELP 1
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_LOAD_ADDR 0x20000
-
-#define CONFIG_SYS_MEMTEST_START 0x100000
-#define CONFIG_SYS_MEMTEST_END 0x400000
-/*#define CONFIG_SYS_DRAM_TEST 1 */
-#undef CONFIG_SYS_DRAM_TEST
-
-/*----------------------------------------------------------------------*
- * Clock and PLL Configuration *
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_HZ 10000000
-#define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
-
-/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
-
-#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
-#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
-
-/*----------------------------------------------------------------------*
- * Network *
- *----------------------------------------------------------------------*/
-
-#define CONFIG_MCFFEC
-#define CONFIG_MII 1
-#define CONFIG_MII_INIT 1
-#define CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_SYS_RX_ETH_BUFFER 8
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-
-#define CONFIG_SYS_FEC0_PINMUX 0
-#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
-#define MCFFEC_TOUT_LOOP 50000
-
-#define CONFIG_ETHADDR 00:CF:52:82:EB:01
-#define CONFIG_OVERWRITE_ETHADDR_ONCE
-
-/*-------------------------------------------------------------------------
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- *-----------------------------------------------------------------------*/
-
-#define CONFIG_SYS_MBAR 0x40000000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- *-----------------------------------------------------------------------*/
-
-#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
-#define CONFIG_SYS_GBL_DATA_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE1 0x00000000
-#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
-
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
-#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
-
-
-/* If M5282 port is fully implemented the monitor base will be behind
- * the vector table. */
-#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
-#else
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
-#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization ??
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
-#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
-#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
-
-#define CONFIG_SYS_MAX_FLASH_SECT 35
-#define CONFIG_SYS_MAX_FLASH_BANKS 2
-#define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
-#define CONFIG_SYS_FLASH_PROTECTION
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 16
-
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM)
-#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
- CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
- CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
- CF_CACR_CEIB | CF_CACR_DBWE | \
- CF_CACR_EUSP)
-
-/*-----------------------------------------------------------------------
- * Memory bank definitions
- */
-
-#define CONFIG_SYS_CS0_BASE 0xFFE00000
-#define CONFIG_SYS_CS0_CTRL 0x00001980
-#define CONFIG_SYS_CS0_MASK 0x001F0001
-
-#define CONFIG_SYS_CS3_BASE 0xE0000000
-#define CONFIG_SYS_CS0_CTRL 0x00001980
-#define CONFIG_SYS_CS3_MASK 0x000F0001
-
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
-#define CONFIG_SYS_PADDR 0x0000000
-#define CONFIG_SYS_PADAT 0x0000000
-
-#define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
-#define CONFIG_SYS_PBDDR 0x0000000
-#define CONFIG_SYS_PBDAT 0x0000000
-
-#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
-#define CONFIG_SYS_PCDDR 0x0000000
-#define CONFIG_SYS_PCDAT 0x0000000
-
-#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
-#define CONFIG_SYS_PCDDR 0x0000000
-#define CONFIG_SYS_PCDAT 0x0000000
-
-#define CONFIG_SYS_PEHLPAR 0xC0
-#define CONFIG_SYS_PUAPAR 0x0F
-#define CONFIG_SYS_DDRUA 0x05
-#define CONFIG_SYS_PJPAR 0xFF
-
-/*-----------------------------------------------------------------------
- * VIDEO configuration
- */
-
-#define CONFIG_VIDEO
-
-#ifdef CONFIG_VIDEO
-#define CONFIG_VIDEO_VCXK 1
-
-#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
-#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
-#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
-#define CONFIG_SYS_VCXK_AUTODETECT 1
-
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
-
-#define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
-
-#define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT
-#define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR
-#define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004
-
-#define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE
-#define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE
-#define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2
-
-#endif /* CONFIG_VIDEO */
-#endif /* _CONFIG_M5282EVB_H */
-/*---------------------------------------------------------------------*/
--- /dev/null
+/*
+ * Configuation settings for the BuS EB+CPU5283 boards (aka EB+MCF-EV123)
+ *
+ * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _CONFIG_EB_CPU5282_H_
+#define _CONFIG_EB_CPU5282_H_
+
+#undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP
+
+/*----------------------------------------------------------------------*
+ * High Level Configuration Options (easy to change) *
+ *----------------------------------------------------------------------*/
+
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5282 /* define processor type */
+
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT (0)
+#define CONFIG_BAUDRATE 9600
+
+#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
+
+#define CONFIG_BOOTCOMMAND "printenv"
+
+/*----------------------------------------------------------------------*
+ * Options *
+ *----------------------------------------------------------------------*/
+
+#define CONFIG_BOOT_RETRY_TIME -1
+#define CONFIG_RESET_TO_RETRY
+#define CONFIG_SPLASH_SCREEN
+
+/*----------------------------------------------------------------------*
+ * Configuration for environment *
+ * Environment is in the second sector of the first 256k of flash *
+ *----------------------------------------------------------------------*/
+
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
+#define CONFIG_ENV_SECT_SIZE 0x4000
+#define CONFIG_ENV_IS_IN_FLASH 1
+#else
+#define CONFIG_ENV_ADDR 0xFFE04000
+#define CONFIG_ENV_SECT_SIZE 0x2000
+#define CONFIG_ENV_IS_IN_FLASH 1
+#endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_LOADB
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
+#define CONFIG_MCFTMR
+
+
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_SYS_PROMPT "\nEB+CPU5282> "
+#define CONFIG_SYS_LONGHELP 1
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_LOAD_ADDR 0x20000
+
+#define CONFIG_SYS_MEMTEST_START 0x100000
+#define CONFIG_SYS_MEMTEST_END 0x400000
+/*#define CONFIG_SYS_DRAM_TEST 1 */
+#undef CONFIG_SYS_DRAM_TEST
+
+/*----------------------------------------------------------------------*
+ * Clock and PLL Configuration *
+ *----------------------------------------------------------------------*/
+#define CONFIG_SYS_HZ 10000000
+#define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
+
+/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
+
+#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
+#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
+
+/*----------------------------------------------------------------------*
+ * Network *
+ *----------------------------------------------------------------------*/
+
+#define CONFIG_MCFFEC
+#define CONFIG_MII 1
+#define CONFIG_MII_INIT 1
+#define CONFIG_SYS_DISCOVER_PHY
+#define CONFIG_SYS_RX_ETH_BUFFER 8
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+
+#define CONFIG_SYS_FEC0_PINMUX 0
+#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
+#define MCFFEC_TOUT_LOOP 50000
+
+#define CONFIG_ETHADDR 00:CF:52:82:EB:01
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+
+/*-------------------------------------------------------------------------
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ *-----------------------------------------------------------------------*/
+
+#define CONFIG_SYS_MBAR 0x40000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ *-----------------------------------------------------------------------*/
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
+#define CONFIG_SYS_GBL_DATA_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE1 0x00000000
+#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
+
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
+#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
+
+
+/* If M5282 port is fully implemented the monitor base will be behind
+ * the vector table. */
+#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
+#else
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
+#endif
+
+#define CONFIG_SYS_MONITOR_LEN 0x20000
+#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+
+#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
+#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
+#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
+
+#define CONFIG_SYS_MAX_FLASH_SECT 35
+#define CONFIG_SYS_MAX_FLASH_BANKS 2
+#define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
+#define CONFIG_SYS_FLASH_PROTECTION
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CONFIG_SYS_CACHELINE_SIZE 16
+
+#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
+ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+ CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
+ CF_CACR_CEIB | CF_CACR_DBWE | \
+ CF_CACR_EUSP)
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+
+#define CONFIG_SYS_CS0_BASE 0xFFE00000
+#define CONFIG_SYS_CS0_CTRL 0x00001980
+#define CONFIG_SYS_CS0_MASK 0x001F0001
+
+#define CONFIG_SYS_CS3_BASE 0xE0000000
+#define CONFIG_SYS_CS0_CTRL 0x00001980
+#define CONFIG_SYS_CS3_MASK 0x000F0001
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
+#define CONFIG_SYS_PADDR 0x0000000
+#define CONFIG_SYS_PADAT 0x0000000
+
+#define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
+#define CONFIG_SYS_PBDDR 0x0000000
+#define CONFIG_SYS_PBDAT 0x0000000
+
+#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
+#define CONFIG_SYS_PCDDR 0x0000000
+#define CONFIG_SYS_PCDAT 0x0000000
+
+#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
+#define CONFIG_SYS_PCDDR 0x0000000
+#define CONFIG_SYS_PCDAT 0x0000000
+
+#define CONFIG_SYS_PEHLPAR 0xC0
+#define CONFIG_SYS_PUAPAR 0x0F
+#define CONFIG_SYS_DDRUA 0x05
+#define CONFIG_SYS_PJPAR 0xFF
+
+/*-----------------------------------------------------------------------
+ * VIDEO configuration
+ */
+
+#define CONFIG_VIDEO
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_VCXK 1
+
+#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
+#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
+#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
+#define CONFIG_SYS_VCXK_AUTODETECT 1
+
+#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
+#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
+#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
+
+#define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT
+#define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR
+#define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
+
+#define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT
+#define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR
+#define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004
+
+#define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE
+#define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE
+#define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2
+
+#endif /* CONFIG_VIDEO */
+#endif /* _CONFIG_M5282EVB_H */
+/*---------------------------------------------------------------------*/
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