]> git.sur5r.net Git - u-boot/commitdiff
ppc4xx: Fix sending type 1 PCI transactions
authorFelix Radensky <felix@embedded-sol.com>
Fri, 22 Jan 2010 23:35:24 +0000 (01:35 +0200)
committerWolfgang Denk <wd@denx.de>
Sat, 23 Jan 2010 16:53:55 +0000 (17:53 +0100)
The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
drivers/pci/pci_indirect.c

index ab51f8d01e8d8346bad7fe23b62a8e0036694a04..2070d0134b77f1527b0cf33948f9f1c18672b255 100644 (file)
@@ -59,7 +59,8 @@ indirect_##rw##_config_##size(struct pci_controller *hose,               \
        cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
        return 0;                                                        \
 }
-#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
+#elif defined(CONFIG_440GX)  || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \
+      defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                       \
 static int                                                              \
 indirect_##rw##_config_##size(struct pci_controller *hose,              \