mips_m4k.c: D or I breaks only if they supported.

For example Realtek RTL8186 (Lexra LX5280 core) don't
support break- and watchpoints.

Change-Id: Ie00102da4bf13a8c42a9ad05910c66884f297cfd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1933
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index d7e426521c0c0673e7bd6a5e5aa5944a5fb4f2e1..4774c49c9fc2dffce95f7d35051e21ebcc706406 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -57,33 +57,37 @@ static int mips_m4k_examine_debug_reason(struct target *target)
        int retval;
 
        if ((target->debug_reason != DBG_REASON_DBGRQ)
-               && (target->debug_reason != DBG_REASON_SINGLESTEP)) {
-               /* get info about inst breakpoint support */
-               retval = target_read_u32(target,
-                       ejtag_info->ejtag_ibs_addr, &break_status);
-               if (retval != ERROR_OK)
-                       return retval;
-               if (break_status & 0x1f) {
-                       /* we have halted on a  breakpoint */
-                       retval = target_write_u32(target,
-                               ejtag_info->ejtag_ibs_addr, 0);
+                       && (target->debug_reason != DBG_REASON_SINGLESTEP)) {
+               if (ejtag_info->debug_caps & EJTAG_DCR_IB) {
+                       /* get info about inst breakpoint support */
+                       retval = target_read_u32(target,
+                               ejtag_info->ejtag_ibs_addr, &break_status);
                        if (retval != ERROR_OK)
                                return retval;
-                       target->debug_reason = DBG_REASON_BREAKPOINT;
+                       if (break_status & 0x1f) {
+                               /* we have halted on a  breakpoint */
+                               retval = target_write_u32(target,
+                                       ejtag_info->ejtag_ibs_addr, 0);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               target->debug_reason = DBG_REASON_BREAKPOINT;
+                       }
                }
 
-               /* get info about data breakpoint support */
-               retval = target_read_u32(target,
-                       ejtag_info->ejtag_dbs_addr, &break_status);
-               if (retval != ERROR_OK)
-                       return retval;
-               if (break_status & 0x1f) {
-                       /* we have halted on a  breakpoint */
-                       retval = target_write_u32(target,
-                               ejtag_info->ejtag_dbs_addr, 0);
+               if (ejtag_info->debug_caps & EJTAG_DCR_DB) {
+                       /* get info about data breakpoint support */
+                       retval = target_read_u32(target,
+                               ejtag_info->ejtag_dbs_addr, &break_status);
                        if (retval != ERROR_OK)
                                return retval;
-                       target->debug_reason = DBG_REASON_WATCHPOINT;
+                       if (break_status & 0x1f) {
+                               /* we have halted on a  breakpoint */
+                               retval = target_write_u32(target,
+                                       ejtag_info->ejtag_dbs_addr, 0);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               target->debug_reason = DBG_REASON_WATCHPOINT;
+                       }
                }
        }