The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
and a DSP.
-config ROCKCHIP_SPL_BACK_TO_BROM
+config SPL_ROCKCHIP_BACK_TO_BROM
bool "SPL returns to bootrom"
default y if ROCKCHIP_RK3036
select ROCKCHIP_BROM_HELPER
+ depends on SPL
+ help
+ Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
+ SPL will return to the boot rom, which will then load the U-Boot
+ binary to keep going on.
+
+config TPL_ROCKCHIP_BACK_TO_BROM
+ bool "TPL returns to bootrom"
+ default y if ROCKCHIP_RK3368
+ select ROCKCHIP_BROM_HELPER
+ depends on TPL
help
Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
SPL will return to the boot rom, which will then load the U-Boot
bool
config SPL_MMC_SUPPORT
- default y if !ROCKCHIP_SPL_BACK_TO_BROM
+ default y if !SPL_ROCKCHIP_BACK_TO_BROM
source "arch/arm/mach-rockchip/rk3036/Kconfig"
source "arch/arm/mach-rockchip/rk3188/Kconfig"
}
setup_arm_clock();
-
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;
int board_init(void)
{
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
struct udevice *pinctrl;
int ret;
debug("DRAM init failed: %d\n", ret);
return;
}
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;
return rk_board_late_init();
}
-#ifndef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
static int veyron_init(void)
{
struct udevice *dev;
int board_init(void)
{
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
struct udevice *pinctrl;
int ret;
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static int spl_node_to_boot_device(int node)
{
struct udevice *parent;
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x800
CONFIG_ROCKCHIP_RK322X=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_EVB_RK3229=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_FENNEC_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_FIREFLY_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_MIQI_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_PHYCORE_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_POPMETAL_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK2=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3188=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK=y
CONFIG_SPL_STACK_R_ADDR=0x60080000
CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
-CONFIG_ROCKCHIP_SPL_BACK_TO_BROM=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
Therefore RK3288 has another loading sequence like RK3036. The option of
U-Boot is controlled with this setting in U-Boot:
- #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+ #define CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
You can create the image via the following operations:
#define CONFIG_SYS_NS16550_MEM32
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x60000000
#else
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SYS_NS16550_MEM32
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
/* Bootrom will load u-boot binary to 0x0 once return from SPL */
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
#define CONFIG_SYS_MMC_ENV_DEV 0
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if defined(ROCKCHIP_BACK_TO_BROM)
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k
#endif
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
/* SPL @ 32k for 34k
* u-boot directly after @ 68k for 400k or so
* ENV @ 992k