]> git.sur5r.net Git - u-boot/commitdiff
imx: ventana: add 'gsc wd' command for enabling and disabling GSC watchdog
authorTim Harvey <tharvey@gateworks.com>
Wed, 8 Apr 2015 19:54:59 +0000 (12:54 -0700)
committerStefano Babic <sbabic@denx.de>
Wed, 22 Apr 2015 12:39:11 +0000 (14:39 +0200)
This adds information about the Gateworks System Controller to the gsc command
such as the firmware version, firmware CRC and status of the GSC watchdog
(if its enabled and if its tripped).

Additionally the 'gsc wd' command can be used to enable or disable the
watchdog with the following usage:
 gsc wd enable [30|60]
 gsc wd disable

Note that the GSC registers are battery-backed by the GSC coincell so once
eanbled, they remain enabled across power-cycles or until either the GSC
firmware has been updated or FLASH has been re-programmed by the Gateworks
JTAG adapter.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
board/gateworks/gw_ventana/gsc.c
board/gateworks/gw_ventana/gsc.h
board/gateworks/gw_ventana/gw_ventana.c

index a62f128b7fd36bec3fcd7e4c59d27ca50f866a8a..718e1651d0f652f609bedb42351cfe2a29a6877c 100644 (file)
@@ -59,7 +59,6 @@ int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
        return ret;
 }
 
-#ifdef CONFIG_CMD_GSC
 static void read_hwmon(const char *name, uint reg, uint size)
 {
        unsigned char buf[3];
@@ -78,11 +77,29 @@ static void read_hwmon(const char *name, uint reg, uint size)
        }
 }
 
-int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int gsc_info(int verbose)
 {
        const char *model = getenv("model");
+       unsigned char buf[16];
 
        i2c_set_bus_num(0);
+       if (gsc_i2c_read(GSC_SC_ADDR, 0, 1, buf, 16))
+               return CMD_RET_FAILURE;
+
+       printf("GSC:   v%d", buf[GSC_SC_FWVER]);
+       printf(" 0x%04x", buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC+1]<<8);
+       printf(" WDT:%sabled", (buf[GSC_SC_CTRL1] & (1<<GSC_SC_CTRL1_WDEN))
+               ? "en" : "dis");
+       if (buf[GSC_SC_STATUS] & (1 << GSC_SC_IRQ_WATCHDOG)) {
+               buf[GSC_SC_STATUS] &= ~(1 << GSC_SC_IRQ_WATCHDOG);
+               puts(" WDT_RESET");
+               gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
+                             &buf[GSC_SC_STATUS], 1);
+       }
+       puts("\n");
+       if (!verbose)
+               return CMD_RET_SUCCESS;
+
        read_hwmon("Temp",     GSC_HWMON_TEMP, 2);
        read_hwmon("VIN",      GSC_HWMON_VIN, 3);
        read_hwmon("VBATT",    GSC_HWMON_VBATT, 3);
@@ -115,9 +132,60 @@ int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        return 0;
 }
 
-U_BOOT_CMD(gsc, 1, 1, do_gsc,
-          "GSC test",
-          ""
-);
+#ifdef CONFIG_CMD_GSC
+static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+       unsigned char reg;
+
+       if (argc < 2)
+               return CMD_RET_USAGE;
+
+       if (strcasecmp(argv[1], "enable") == 0) {
+               int timeout = 0;
+
+               if (argc > 2)
+                       timeout = simple_strtoul(argv[2], NULL, 10);
+               i2c_set_bus_num(0);
+               if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+                       return CMD_RET_FAILURE;
+               reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
+               if (timeout == 60)
+                       reg |= (1 << GSC_SC_CTRL1_WDTIME);
+               else
+                       timeout = 30;
+               reg |= (1 << GSC_SC_CTRL1_WDEN);
+               if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+                       return CMD_RET_FAILURE;
+               printf("GSC Watchdog enabled with timeout=%d seconds\n",
+                      timeout);
+       } else if (strcasecmp(argv[1], "disable") == 0) {
+               i2c_set_bus_num(0);
+               if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+                       return CMD_RET_FAILURE;
+               reg &= ~((1 << GSC_SC_CTRL1_WDEN) | (1 << GSC_SC_CTRL1_WDTIME));
+               if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+                       return CMD_RET_FAILURE;
+               printf("GSC Watchdog disabled\n");
+       } else {
+               return CMD_RET_USAGE;
+       }
+       return CMD_RET_SUCCESS;
+}
+
+static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+       if (argc < 2)
+               return gsc_info(1);
+
+       if (strcasecmp(argv[1], "wd") == 0)
+               return do_gsc_wd(cmdtp, flag, --argc, ++argv);
+
+       return CMD_RET_USAGE;
+}
+
+U_BOOT_CMD(
+       gsc, 4, 1, do_gsc, "GSC configuration",
+       "[wd enable [30|60]]|[wd disable]\n"
+       );
 
 #endif /* CONFIG_CMD_GSC */
index 0a70774cd98575a14b2b1c276faf9b190ea5e91c..2d4969ecdd3e5bb95be54f319c6f348f733e01ec 100644 (file)
@@ -19,12 +19,15 @@ enum {
        GSC_SC_CTRL0            = 0x00,
        GSC_SC_CTRL1            = 0x01,
        GSC_SC_STATUS           = 0x0a,
+       GSC_SC_FWCRC            = 0x0c,
        GSC_SC_FWVER            = 0x0e,
 };
 
 /* System Controller Control1 bits */
 enum {
-       GSC_SC_CTRL1_WDDIS      = 7, /* 1 = disable watchdog */
+       GSC_SC_CTRL1_WDTIME     = 4, /* 1 = 60s timeout, 0 = 30s timeout */
+       GSC_SC_CTRL1_WDEN       = 5, /* 1 = enable, 0 = disable */
+       GSC_SC_CTRL1_WDDIS      = 7, /* 1 = disable boot watchdog */
 };
 
 /* System Controller Interrupt bits */
@@ -62,5 +65,6 @@ enum {
  */
 int gsc_i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len);
 int gsc_i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len);
+int gsc_info(int verbose);
 #endif
 
index 871af09d418840539c046d54940c16dbb290013b..b7199f1b420336b16ac9a73beba521adfcf9e3b6 100644 (file)
@@ -1430,15 +1430,8 @@ int checkboard(void)
                return 0;
 
        /* Display GSC firmware revision/CRC/status */
-       i2c_set_bus_num(CONFIG_I2C_GSC);
-       if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_FWVER, 1, buf, 1)) {
-               printf("GSC:   v%d", buf[0]);
-               if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_STATUS, 1, buf, 4)) {
-                       printf(" 0x%04x", buf[2] | buf[3]<<8); /* CRC */
-                       printf(" 0x%02x", buf[0]); /* irq status */
-               }
-               puts("\n");
-       }
+       gsc_info(0);
+
        /* Display RTC */
        if (!gsc_i2c_read(GSC_RTC_ADDR, 0x00, 1, buf, 4)) {
                printf("RTC:   %d\n",
@@ -1575,13 +1568,6 @@ int misc_init_r(void)
        } else {
                puts("Error: could not disable GSC Watchdog\n");
        }
-       if (!gsc_i2c_read(GSC_SC_ADDR, GSC_SC_STATUS, 1, &reg, 1)) {
-               if (reg & (1 << GSC_SC_IRQ_WATCHDOG)) { /* watchdog timeout */
-                       puts("GSC boot watchdog timeout detected\n");
-                       reg &= ~(1 << GSC_SC_IRQ_WATCHDOG); /* clear flag */
-                       gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1, &reg, 1);
-               }
-       }
 
        return 0;
 }