PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7)
- # SEE README.arm-unaligned-accesses
+ # On supported platforms we set the bit which causes us to trap on unaligned
+ # memory access. This is the opposite of what the compiler expects to be
+ # the default so we must pass in -mno-unaligned-access so that it is aware
+ # of our decision.
PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
- PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED)
+ PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)
-
-ifneq ($(CONFIG_IMX_CONFIG),)
-ifdef CONFIG_SPL
-ifdef CONFIG_SPL_BUILD
-ALL-y += $(OBJTREE)/SPL
-endif
-else
-ALL-y += u-boot.imx
-endif
-endif
configure_module_pin_mux(i2c0_pin_mux);
if (board_is_gpevm())
- configure_module_pin_mux(gpio0_22_pin_mux);
+ configure_module_pin_mux(gpio5_7_pin_mux);
+ configure_module_pin_mux(qspi_pin_mux);
}
void enable_i2c0_pin_mux(void)
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
+/* SPI */
+#undef CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_TI_SPI_MMAP
+#define CONFIG_QSPI_SEL_GPIO 48
+#define CONFIG_SF_DEFAULT_SPEED 48000000
+#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SPL_SPI_CS 0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
+
+ /* Enhance our eMMC support / experience. */
+ #define CONFIG_CMD_GPT
+ #define CONFIG_EFI_PARTITION
+ #define CONFIG_PARTITION_UUIDS
+ #define CONFIG_CMD_PART
+
#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \