]> git.sur5r.net Git - u-boot/commitdiff
imx: ventana: added DT fixup for GW551x-A video input
authorTim Harvey <tharvey@gateworks.com>
Wed, 8 Apr 2015 19:54:53 +0000 (12:54 -0700)
committerStefano Babic <sbabic@denx.de>
Wed, 22 Apr 2015 12:39:10 +0000 (14:39 +0200)
The GW551x-A revision does not have the CSI0_DATA_EN pin connected, therefore
we need to make sure that signal is not muxed to the CSI_DATA_EN signal
internally and do so by steering it to the unused GPIO5_IO20.

We do this so that the kernel device-tree can properly define the signal for
RevB and beyond boards that do have this hooked up properly and require it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
board/gateworks/gw_ventana/gw_ventana.c

index 307ffa583e2be440874fe3fdc32a79e01739058e..068c7264bb2c8302652ee6a273525938b8d154e9 100644 (file)
@@ -1609,6 +1609,41 @@ int ft_board_setup(void *blob, bd_t *bd)
                        fdt_status_disabled(blob, i);
        }
 
+       /*
+        * isolate CSI0_DATA_EN for GW551x below revB to work around
+        * errata causing non functional digital video in (it is not hooked up)
+        */
+       else if (board_type == GW551x && rev == 'A') {
+               u32 *range = NULL;
+               int len;
+               const u32 *handle = NULL;
+
+               i = fdt_node_offset_by_compatible(blob, -1,
+                                                 "fsl,imx-tda1997x-video");
+               if (i)
+                       handle = fdt_getprop(blob, i, "pinctrl-0", NULL);
+               if (handle)
+                       i = fdt_node_offset_by_phandle(blob,
+                                                      fdt32_to_cpu(*handle));
+               if (i)
+                       range = (u32 *)fdt_getprop(blob, i, "fsl,pins", &len);
+               if (range) {
+                       len /= sizeof(u32);
+                       for (i = 0; i < len; i += 6) {
+                               u32 mux_reg = fdt32_to_cpu(range[i+0]);
+                               u32 conf_reg = fdt32_to_cpu(range[i+1]);
+                               /* mux PAD_CSI0_DATA_EN to GPIO */
+                               if (is_cpu_type(MXC_CPU_MX6Q) &&
+                                   mux_reg == 0x260 && conf_reg == 0x630)
+                                       range[i+3] = cpu_to_fdt32(0x5);
+                               else if (!is_cpu_type(MXC_CPU_MX6Q) &&
+                                   mux_reg == 0x08c && conf_reg == 0x3a0)
+                                       range[i+3] = cpu_to_fdt32(0x5);
+                       }
+                       fdt_setprop_inplace(blob, i, "fsl,pins", range, len);
+               }
+       }
+
        /*
         * Peripheral Config:
         *  remove nodes by alias path if EEPROM config tells us the