puts("couldn't find /cpus node\n");
return;
}
- of_bus_default_count_cells(blob, off, &addr_cells, NULL);
+ fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
while (off != -FDT_ERR_NOTFOUND) {
reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
if (reg) {
- core_id = of_read_number(reg, addr_cells);
+ core_id = fdt_read_number(reg, addr_cells);
if (core_id == 0 || (is_core_online(core_id))) {
val = spin_tbl_addr;
val += id_to_core(core_id) *
gd->ram_size = 0;
for (i = 0; i < len; i++) {
- ram_banks[i].start = of_read_number(prop, na);
+ ram_banks[i].start = fdt_read_number(prop, na);
prop += na;
- ram_banks[i].size = of_read_number(prop, ns);
+ ram_banks[i].size = fdt_read_number(prop, ns);
prop += ns;
gd->ram_size += ram_banks[i].size;
}
};
/* Default translator (generic bus) */
-void of_bus_default_count_cells(const void *blob, int parentoffset,
+void fdt_support_default_count_cells(const void *blob, int parentoffset,
int *addrc, int *sizec)
{
const fdt32_t *prop;
{
u64 cp, s, da;
- cp = of_read_number(range, na);
- s = of_read_number(range + na + pna, ns);
- da = of_read_number(addr, na);
+ cp = fdt_read_number(range, na);
+ s = fdt_read_number(range + na + pna, ns);
+ da = fdt_read_number(addr, na);
debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64
", da=%" PRIu64 "\n", cp, s, da);
static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na)
{
- u64 a = of_read_number(addr, na);
+ u64 a = fdt_read_number(addr, na);
memset(addr, 0, na * 4);
a += offset;
if (na > 1)
if ((addr[0] ^ range[0]) & cpu_to_be32(1))
return OF_BAD_ADDR;
- cp = of_read_number(range + 1, na - 1);
- s = of_read_number(range + na + pna, ns);
- da = of_read_number(addr + 1, na - 1);
+ cp = fdt_read_number(range + 1, na - 1);
+ s = fdt_read_number(range + na + pna, ns);
+ da = fdt_read_number(addr + 1, na - 1);
debug("OF: ISA map, cp=%" PRIu64 ", s=%" PRIu64
", da=%" PRIu64 "\n", cp, s, da);
{
.name = "default",
.addresses = "reg",
- .count_cells = of_bus_default_count_cells,
+ .count_cells = fdt_support_default_count_cells,
.map = of_bus_default_map,
.translate = of_bus_default_translate,
},
*/
ranges = fdt_getprop(blob, parent, rprop, &rlen);
if (ranges == NULL || rlen == 0) {
- offset = of_read_number(addr, na);
+ offset = fdt_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("OF: no ranges, 1:1 translation\n");
goto finish;
/* If root, we have finished */
if (parent < 0) {
debug("OF: reached root node\n");
- result = of_read_number(addr, na);
+ result = fdt_read_number(addr, na);
break;
}
fdt32_t cells[4];
int i, addrc, sizec, ret;
- of_bus_default_count_cells(fdt, fdt_parent_offset(fdt, node),
- &addrc, &sizec);
+ fdt_support_default_count_cells(fdt, fdt_parent_offset(fdt, node),
+ &addrc, &sizec);
i = 0;
if (addrc == 2)
cells[i++] = cpu_to_fdt32(base_address >> 32);
na = of_n_addr_cells(np);
ns = of_n_addr_cells(np);
- *sizep = of_read_number(prop + na, ns);
- return of_read_number(prop, na);
+ *sizep = fdt_read_number(prop + na, ns);
+ return fdt_read_number(prop, na);
} else {
return fdtdec_get_addr_size(gd->fdt_blob,
ofnode_to_offset(node), property,
* match with reg-names.
*/
parent = fdt_parent_offset(blob, node);
- of_bus_default_count_cells(blob, parent, &addrc, &sizec);
+ fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
list = fdt_getprop(blob, node, "reg-names", &len);
if (!list)
return -ENOENT;
int len, idx;
parent = fdt_parent_offset(blob, node);
- of_bus_default_count_cells(blob, parent, &addrc, &sizec);
+ fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
/* decode regs, there may be multiple reg tuples. */
cell = fdt_getprop(blob, node, "reg", &len);
if (!cell)
* match with reg-names.
*/
parent = fdt_parent_offset(blob, node);
- of_bus_default_count_cells(blob, parent, &addrc, &sizec);
+ fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
list = fdt_getprop(blob, node, "reg-names", &len);
if (!list)
return -ENOENT;
* match with reg-names.
*/
parent = fdt_parent_offset(blob, node);
- of_bus_default_count_cells(blob, parent, &addrc, &sizec);
+ fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
list = fdt_getprop(blob, node, "reg-names", &len);
if (!list)
return -ENOENT;
}
/* Helper to read a big number; size is in cells (not bytes) */
-static inline u64 of_read_number(const fdt32_t *cell, int size)
+static inline u64 fdt_read_number(const fdt32_t *cell, int size)
{
u64 r = 0;
while (size--)
return r;
}
-void of_bus_default_count_cells(const void *blob, int parentoffset,
+void fdt_support_default_count_cells(const void *blob, int parentoffset,
int *addrc, int *sizec);
int ft_verify_fdt(void *fdt);
int arch_fixup_memory_node(void *blob);