]> git.sur5r.net Git - u-boot/commitdiff
vexpress: Check TC2 firmware support before defaulting to nonsec booting
authorJon Medhurst \(Tixy\) <tixy@linaro.org>
Thu, 23 Jun 2016 12:37:32 +0000 (13:37 +0100)
committerTom Rini <trini@konsulko.com>
Mon, 15 Aug 2016 22:46:38 +0000 (18:46 -0400)
The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
arch/arm/lib/bootm.c
board/armltd/vexpress/Makefile
board/armltd/vexpress/vexpress_tc2.c [new file with mode: 0644]

index f9ed7fe38ab8d790a0b712341a5af2ef576c0ed8..53c3141322a0de8f30e18c20fd2157483570fe4b 100644 (file)
@@ -248,15 +248,20 @@ static void boot_prep_linux(bootm_headers_t *images)
        }
 }
 
-#ifdef CONFIG_ARMV7_NONSEC
-bool armv7_boot_nonsec(void)
+__weak bool armv7_boot_nonsec_default(void)
 {
-       char *s = getenv("bootm_boot_mode");
 #ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
-       bool nonsec = false;
+       return false;
 #else
-       bool nonsec = true;
+       return true;
 #endif
+}
+
+#ifdef CONFIG_ARMV7_NONSEC
+bool armv7_boot_nonsec(void)
+{
+       char *s = getenv("bootm_boot_mode");
+       bool nonsec = armv7_boot_nonsec_default();
 
        if (s && !strcmp(s, "sec"))
                nonsec = false;
index 1dd6780708c4250614450287140034d1225d35b3..95f4ec0cbd84401733f0dd79f4da204b9fb361f8 100644 (file)
@@ -6,3 +6,4 @@
 #
 
 obj-y  := vexpress_common.o
+obj-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress_tc2.o
diff --git a/board/armltd/vexpress/vexpress_tc2.c b/board/armltd/vexpress/vexpress_tc2.c
new file mode 100644 (file)
index 0000000..ebb41a8
--- /dev/null
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2016 Linaro
+ * Jon Medhurst <tixy@linaro.org>
+ *
+ * TC2 specific code for Versatile Express.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/io.h>
+
+#define SCC_BASE       0x7fff0000
+
+bool armv7_boot_nonsec_default(void)
+{
+#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
+       return false
+#else
+       /*
+        * The Serial Configuration Controller (SCC) register at address 0x700
+        * contains flags for configuring the behaviour of the Boot Monitor
+        * (which CPUs execute from reset). Two of these bits are of interest:
+        *
+        * bit 12 = Use per-cpu mailboxes for power management
+        * bit 13 = Power down the non-boot cluster
+        *
+        * It is only when both of these are false that U-Boot's current
+        * implementation of 'nonsec' mode can work as expected because we
+        * rely on getting all CPUs to execute _nonsec_init, so let's check that.
+        */
+       return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
+#endif
+}