be used if available. These functions may be faster under some
                conditions but may increase the binary size.
 
+Freescale QE/FMAN Firmware Support:
+-----------------------------------
+
+The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
+loading of "firmware", which is encoded in the QE firmware binary format.
+This firmware often needs to be loaded during U-Boot booting, so macros
+are used to identify the storage device (NOR flash, SPI, etc) and the address
+within that device.
+
+- CONFIG_SYS_QE_FMAN_FW_ADDR
+       The address in the storage device where the firmware is located.  The
+       meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+       is also specified.
+
+- CONFIG_SYS_QE_FMAN_FW_LENGTH
+       The maximum possible size of the firmware.  The firmware binary format
+       has a field that specifies the actual size of the firmware, but it
+       might not be possible to read any part of the firmware unless some
+       local storage is allocated to hold the entire firmware first.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NOR
+       Specifies that QE/FMAN firmware is located in NOR flash, mapped as
+       normal addressable memory via the LBC.  CONFIG_SYS_FMAN_FW_ADDR is the
+       virtual address in NOR flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NAND
+       Specifies that QE/FMAN firmware is located in NAND flash.
+       CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_MMC
+       Specifies that QE/FMAN firmware is located on the primary SD/MMC
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
+       Specifies that QE/FMAN firmware is located on the primary SPI
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+
 Building the Software:
 ======================
 
 
 #include <asm/fsl_serdes.h>
 #include <linux/compiler.h>
 #include "mp.h"
-#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #include <nand.h>
 #include <errno.h>
 #endif
 {
 #ifdef CONFIG_QE
        uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
-#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
        int ret;
-       size_t fw_length = CONFIG_SYS_QE_FW_LENGTH;
+       size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
 
        /* load QE firmware from NAND flash to DDR first */
-       ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND,
-                       &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
+       ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_IN_NAND,
+                       &fw_length, (u_char *)CONFIG_SYS_QE_FMAN_FW_ADDR);
 
        if (ret && ret == -EUCLEAN) {
                printf ("NAND read for QE firmware at offset %x failed %d\n",
-                               CONFIG_SYS_QE_FW_IN_NAND, ret);
+                               CONFIG_SYS_QE_FMAN_FW_IN_NAND, ret);
        }
 #endif
        qe_init(qe_base);
 
                return;
        }
 
-       if (length > CONFIG_SYS_FMAN_FW_LENGTH) {
+       if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
                printf("Fman firmware at %p is too large (size=%u)\n",
                       fmanfw, length);
                return;
 
 #include "fm.h"
 #include "../../qe/qe.h"               /* For struct qe_firmware */
 
-#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #include <nand.h>
 #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
 #include <spi_flash.h>
-#elif defined(CONFIG_SYS_QE_FW_IN_MMC)
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_MMC)
 #include <mmc.h>
 #endif
 
 {
        int rc;
        char env_addr[32];
-#if defined(CONFIG_SYS_FMAN_FW_ADDR)
-       void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
-#elif defined(CONFIG_SYS_QE_FW_IN_NAND)
-       size_t fw_length = CONFIG_SYS_FMAN_FW_LENGTH;
-       void *addr = malloc(CONFIG_SYS_FMAN_FW_LENGTH);
+#if defined(CONFIG_SYS_QE_FMAN_FW_IN_NOR)
+       void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR;
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_NAND)
+       size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
+       void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
 
-       rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND,
+       rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_ADDR,
                       &fw_length, (u_char *)addr);
        if (rc == -EUCLEAN) {
                printf("NAND read of FMAN firmware at offset 0x%x failed %d\n",
-                       CONFIG_SYS_QE_FW_IN_NAND, rc);
+                       CONFIG_SYS_QE_FMAN_FW_ADDR, rc);
        }
 #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
        struct spi_flash *ucode_flash;
-       void *addr = malloc(CONFIG_SYS_FMAN_FW_LENGTH);
+       void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
        int ret = 0;
 
        ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
        if (!ucode_flash)
                printf("SF: probe for ucode failed\n");
        else {
-               ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FW_IN_SPIFLASH,
-                               CONFIG_SYS_FMAN_FW_LENGTH, addr);
+               ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FMAN_FW_ADDR,
+                               CONFIG_SYS_QE_FMAN_FW_LENGTH, addr);
                if (ret)
                        printf("SF: read for ucode failed\n");
                spi_flash_free(ucode_flash);
        }
-#elif defined(CONFIG_SYS_QE_FW_IN_MMC)
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_MMC)
        int dev = CONFIG_SYS_MMC_ENV_DEV;
-       void *addr = malloc(CONFIG_SYS_FMAN_FW_LENGTH);
-       u32 cnt = CONFIG_SYS_FMAN_FW_LENGTH / 512;
-       u32 blk = CONFIG_SYS_QE_FW_IN_MMC / 512;
+       void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
+       u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512;
+       u32 blk = CONFIG_SYS_QE_FMAN_FW_ADDR / 512;
        struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
 
        if (!mmc)
 
        /* Init the QE IMMR base */
        qe_immr = (qe_map_t *)qe_base;
 
-#ifdef CONFIG_SYS_QE_FW_ADDR
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NOR
        /*
         * Upload microcode to IRAM for those SOCs which do not have ROM in QE.
         */
-       qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR);
+       qe_upload_firmware((const void *)CONFIG_SYS_QE_FMAN_FW_ADDR);
 
        /* enable the microcode in IRAM */
        out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
 
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change */
 
 /* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FW_ADDR  0xfff00000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xfff00000
 
 /*
  * BOOTP options
 
 #ifndef CONFIG_NAND
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xEF000000
 #else
-#define CONFIG_SYS_QE_FW_IN_NAND       0x1f00000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x1f00000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
 
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
  * env, so we got 0x110000.
  */
-#define CONFIG_SYS_QE_FW_IN_SPIFLASH   0x110000
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
  * about 545KB (1089 blocks), Env is stored after the image, and the env size is
  * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
  */
-#define CONFIG_SYS_QE_FW_IN_MMC                (512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (512 * 1130)
 #elif defined(CONFIG_NAND)
-#define CONFIG_SYS_QE_FW_IN_NAND       (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xEF000000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
 
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
  * env, so we got 0x110000.
  */
-#define CONFIG_SYS_QE_FW_IN_SPIFLASH   0x110000
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
  * about 545KB (1089 blocks), Env is stored after the image, and the env size is
  * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
  */
-#define CONFIG_SYS_QE_FW_IN_MMC                (512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (512 * 1130)
 #elif defined(CONFIG_NAND)
-#define CONFIG_SYS_QE_FW_IN_NAND       (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR             0xEF000000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
 
 
 #ifdef CONFIG_QE
 /* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FW_ADDR          0xefec0000
-#define CONFIG_SYS_QE_FW_LENGTH                0x10000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xefec0000
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #endif /* CONFIG_QE */
 
 #ifdef CONFIG_P1025RDB