+++ /dev/null
-/*
- * blackfin-config-post.h - setup common defines for Blackfin boards based on config.h
- *
- * Copyright (c) 2007-2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef __ASM_BLACKFIN_CONFIG_POST_H__
-#define __ASM_BLACKFIN_CONFIG_POST_H__
-
-/* Sanity check CONFIG_BFIN_CPU */
-#ifndef CONFIG_BFIN_CPU
-# error CONFIG_BFIN_CPU: your board config needs to define this
-#endif
-
-/* Make sure the structure is properly aligned */
-#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR)
-# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned
-#endif
-
-/* Set default CONFIG_VCO_HZ if need be */
-#if !defined(CONFIG_VCO_HZ)
-# if (CONFIG_CLKIN_HALF == 0)
-# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
-# else
-# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2)
-# endif
-#endif
-
-/* Set default CONFIG_CCLK_HZ if need be */
-#if !defined(CONFIG_CCLK_HZ)
-# if (CONFIG_PLL_BYPASS == 0)
-# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV)
-# else
-# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
-# endif
-#endif
-
-/* Set default CONFIG_SCLK_HZ if need be */
-#if !defined(CONFIG_SCLK_HZ)
-# if (CONFIG_PLL_BYPASS == 0)
-# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV)
-# else
-# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
-# endif
-#endif
-
-/* Since we use these to program PLL registers directly,
- * make sure the values are sane and won't screw us up.
- */
-#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT
-# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63)
-#endif
-#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF
-# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1
-#endif
-#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS
-# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1
-#endif
-
-/* Using L1 scratch pad makes sense for everyone by default. */
-#ifndef CONFIG_LINUX_CMDLINE_ADDR
-# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH
-#endif
-#ifndef CONFIG_LINUX_CMDLINE_SIZE
-# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE
-#endif
-
-/* Set default SPI flash CS to the one we boot from */
-#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS)
-# define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL
-#endif
-
-/* Default/common Blackfin memory layout */
-#ifndef CONFIG_SYS_SDRAM_BASE
-# define CONFIG_SYS_SDRAM_BASE 0
-#endif
-#ifndef CONFIG_SYS_MAX_RAM_SIZE
-# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
-#endif
-#ifndef CONFIG_SYS_MONITOR_BASE
-# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN)
-#endif
-#ifndef CONFIG_SYS_MALLOC_BASE
-# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
-#endif
-#ifndef CONFIG_SYS_GBL_DATA_SIZE
-# define CONFIG_SYS_GBL_DATA_SIZE (128)
-#endif
-#ifndef CONFIG_SYS_GBL_DATA_ADDR
-# define CONFIG_SYS_GBL_DATA_ADDR (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
-#endif
-#ifndef CONFIG_STACKBASE
-# define CONFIG_STACKBASE (CONFIG_SYS_GBL_DATA_ADDR - 4)
-#endif
-#ifndef CONFIG_SYS_MEMTEST_START
-# define CONFIG_SYS_MEMTEST_START 0
-#endif
-#ifndef CONFIG_SYS_MEMTEST_END
-# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4)
-#endif
-
-/* Check to make sure everything fits in external RAM */
-#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE)
-# error Memory Map does not fit into configuration
-#endif
-
-/* Default/common Blackfin environment settings */
-#ifndef CONFIG_LOADADDR
-# define CONFIG_LOADADDR 0x1000000
-#endif
-#ifndef CONFIG_SYS_LOAD_ADDR
-# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#endif
-#ifndef CONFIG_SYS_BOOTM_LEN
-# define CONFIG_SYS_BOOTM_LEN 0x4000000
-#endif
-#ifndef CONFIG_SYS_PROMPT
-# define CONFIG_SYS_PROMPT "bfin> "
-#endif
-#ifndef CONFIG_SYS_CBSIZE
-# ifdef CONFIG_CMD_KGDB
-# define CONFIG_SYS_CBSIZE 1024
-# else
-# define CONFIG_SYS_CBSIZE 256
-# endif
-#endif
-#ifndef CONFIG_SYS_BARGSIZE
-# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#endif
-#ifndef CONFIG_SYS_PBSIZE
-# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#endif
-#ifndef CONFIG_SYS_MAXARGS
-# define CONFIG_SYS_MAXARGS 16
-#endif
-#if defined(CONFIG_SYS_HZ)
-# if (CONFIG_SYS_HZ != 1000)
-# warning "CONFIG_SYS_HZ must always be 1000"
-# endif
-# undef CONFIG_SYS_HZ
-#endif
-#define CONFIG_SYS_HZ 1000
-#ifndef CONFIG_SYS_BAUDRATE_TABLE
-# define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#endif
-
-#endif
+++ /dev/null
-/*
- * blackfin-config-pre.h - common defines for Blackfin boards in config.h
- *
- * Copyright (c) 2007 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef __ASM_BLACKFIN_CONFIG_PRE_H__
-#define __ASM_BLACKFIN_CONFIG_PRE_H__
-
-/* Misc helper functions */
-#define XMK_STR(x) #x
-#define MK_STR(x) XMK_STR(x)
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-
-/* Bootmode defines -- your config needs to select this via CONFIG_BFIN_BOOT_MODE.
- * Depending on your cpu, some of these may not be valid, check your HRM.
- * The actual values here are meaningless as long as they're unique.
- */
-#define BFIN_BOOT_BYPASS 1 /* bypass bootrom */
-#define BFIN_BOOT_PARA 2 /* boot ldr out of parallel flash */
-#define BFIN_BOOT_SPI_MASTER 3 /* boot ldr out of serial flash */
-#define BFIN_BOOT_SPI_SLAVE 4 /* boot ldr as spi slave */
-#define BFIN_BOOT_TWI_MASTER 5 /* boot ldr over twi device */
-#define BFIN_BOOT_TWI_SLAVE 6 /* boot ldr over twi slave */
-#define BFIN_BOOT_UART 7 /* boot ldr over uart */
-#define BFIN_BOOT_IDLE 8 /* do nothing, just idle */
-#define BFIN_BOOT_FIFO 9 /* boot ldr out of FIFO */
-#define BFIN_BOOT_MEM 10 /* boot ldr out of memory (warmboot) */
-#define BFIN_BOOT_16HOST_DMA 11 /* boot ldr from 16-bit host dma */
-#define BFIN_BOOT_8HOST_DMA 12 /* boot ldr from 8-bit host dma */
-#define BFIN_BOOT_NAND 13 /* boot ldr from nand flash */
-
-#ifndef __ASSEMBLY__
-static inline const char *get_bfin_boot_mode(int bfin_boot)
-{
- switch (bfin_boot) {
- case BFIN_BOOT_BYPASS: return "bypass";
- case BFIN_BOOT_PARA: return "parallel flash";
- case BFIN_BOOT_SPI_MASTER: return "spi flash";
- case BFIN_BOOT_SPI_SLAVE: return "spi slave";
- case BFIN_BOOT_TWI_MASTER: return "i2c flash";
- case BFIN_BOOT_TWI_SLAVE: return "i2c slave";
- case BFIN_BOOT_UART: return "uart";
- case BFIN_BOOT_IDLE: return "idle";
- case BFIN_BOOT_FIFO: return "fifo";
- case BFIN_BOOT_MEM: return "memory";
- case BFIN_BOOT_16HOST_DMA: return "16bit dma";
- case BFIN_BOOT_8HOST_DMA: return "8bit dma";
- case BFIN_BOOT_NAND: return "nand flash";
- default: return "INVALID";
- }
-}
-#endif
-
-/* Most bootroms allow for EVT1 redirection */
-#if ((defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__)) \
- && __SILICON_REVISION__ < 3) || defined(__ADSPBF561__)
-# undef CONFIG_BFIN_BOOTROM_USES_EVT1
-#else
-# define CONFIG_BFIN_BOOTROM_USES_EVT1
-#endif
-
-/* Define the default SPI CS used when booting out of SPI */
-#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
- defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__) || \
- defined(__ADSPBF51x__)
-# define BFIN_BOOT_SPI_SSEL 2
-#else
-# define BFIN_BOOT_SPI_SSEL 1
-#endif
-
-#endif
--- /dev/null
+/*
+ * config-pre.h - common defines for Blackfin boards in config.h
+ *
+ * Copyright (c) 2007-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __ASM_BLACKFIN_CONFIG_PRE_H__
+#define __ASM_BLACKFIN_CONFIG_PRE_H__
+
+/* Misc helper functions */
+#define XMK_STR(x) #x
+#define MK_STR(x) XMK_STR(x)
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+/* Bootmode defines -- your config needs to select this via CONFIG_BFIN_BOOT_MODE.
+ * Depending on your cpu, some of these may not be valid, check your HRM.
+ * The actual values here are meaningless as long as they're unique.
+ */
+#define BFIN_BOOT_BYPASS 1 /* bypass bootrom */
+#define BFIN_BOOT_PARA 2 /* boot ldr out of parallel flash */
+#define BFIN_BOOT_SPI_MASTER 3 /* boot ldr out of serial flash */
+#define BFIN_BOOT_SPI_SLAVE 4 /* boot ldr as spi slave */
+#define BFIN_BOOT_TWI_MASTER 5 /* boot ldr over twi device */
+#define BFIN_BOOT_TWI_SLAVE 6 /* boot ldr over twi slave */
+#define BFIN_BOOT_UART 7 /* boot ldr over uart */
+#define BFIN_BOOT_IDLE 8 /* do nothing, just idle */
+#define BFIN_BOOT_FIFO 9 /* boot ldr out of FIFO */
+#define BFIN_BOOT_MEM 10 /* boot ldr out of memory (warmboot) */
+#define BFIN_BOOT_16HOST_DMA 11 /* boot ldr from 16-bit host dma */
+#define BFIN_BOOT_8HOST_DMA 12 /* boot ldr from 8-bit host dma */
+#define BFIN_BOOT_NAND 13 /* boot ldr from nand flash */
+
+#ifndef __ASSEMBLY__
+static inline const char *get_bfin_boot_mode(int bfin_boot)
+{
+ switch (bfin_boot) {
+ case BFIN_BOOT_BYPASS: return "bypass";
+ case BFIN_BOOT_PARA: return "parallel flash";
+ case BFIN_BOOT_SPI_MASTER: return "spi flash";
+ case BFIN_BOOT_SPI_SLAVE: return "spi slave";
+ case BFIN_BOOT_TWI_MASTER: return "i2c flash";
+ case BFIN_BOOT_TWI_SLAVE: return "i2c slave";
+ case BFIN_BOOT_UART: return "uart";
+ case BFIN_BOOT_IDLE: return "idle";
+ case BFIN_BOOT_FIFO: return "fifo";
+ case BFIN_BOOT_MEM: return "memory";
+ case BFIN_BOOT_16HOST_DMA: return "16bit dma";
+ case BFIN_BOOT_8HOST_DMA: return "8bit dma";
+ case BFIN_BOOT_NAND: return "nand flash";
+ default: return "INVALID";
+ }
+}
+#endif
+
+/* Most bootroms allow for EVT1 redirection */
+#if ((defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__)) \
+ && __SILICON_REVISION__ < 3) || defined(__ADSPBF561__)
+# undef CONFIG_BFIN_BOOTROM_USES_EVT1
+#else
+# define CONFIG_BFIN_BOOTROM_USES_EVT1
+#endif
+
+/* Define the default SPI CS used when booting out of SPI */
+#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
+ defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__) || \
+ defined(__ADSPBF51x__)
+# define BFIN_BOOT_SPI_SSEL 2
+#else
+# define BFIN_BOOT_SPI_SSEL 1
+#endif
+
+#endif
/*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * config.h - setup common defines for Blackfin boards based on config.h
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Copyright (c) 2007-2009 Analog Devices Inc.
*
+ * Licensed under the GPL-2 or later.
*/
-#ifndef _ASM_CONFIG_H_
-#define _ASM_CONFIG_H_
+#ifndef __ASM_BLACKFIN_CONFIG_POST_H__
+#define __ASM_BLACKFIN_CONFIG_POST_H__
+
+/* Sanity check CONFIG_BFIN_CPU */
+#ifndef CONFIG_BFIN_CPU
+# error CONFIG_BFIN_CPU: your board config needs to define this
+#endif
+
+/* Make sure the structure is properly aligned */
+#if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR)
+# error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned
+#endif
+
+/* Set default CONFIG_VCO_HZ if need be */
+#if !defined(CONFIG_VCO_HZ)
+# if (CONFIG_CLKIN_HALF == 0)
+# define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)
+# else
+# define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2)
+# endif
+#endif
+
+/* Set default CONFIG_CCLK_HZ if need be */
+#if !defined(CONFIG_CCLK_HZ)
+# if (CONFIG_PLL_BYPASS == 0)
+# define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV)
+# else
+# define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
+# endif
+#endif
+
+/* Set default CONFIG_SCLK_HZ if need be */
+#if !defined(CONFIG_SCLK_HZ)
+# if (CONFIG_PLL_BYPASS == 0)
+# define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV)
+# else
+# define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
+# endif
+#endif
+
+/* Since we use these to program PLL registers directly,
+ * make sure the values are sane and won't screw us up.
+ */
+#if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT
+# error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63)
+#endif
+#if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF
+# error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1
+#endif
+#if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS
+# error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1
+#endif
+
+/* Using L1 scratch pad makes sense for everyone by default. */
+#ifndef CONFIG_LINUX_CMDLINE_ADDR
+# define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH
+#endif
+#ifndef CONFIG_LINUX_CMDLINE_SIZE
+# define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE
+#endif
+
+/* Set default SPI flash CS to the one we boot from */
+#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS)
+# define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL
+#endif
+
+/* Default/common Blackfin memory layout */
+#ifndef CONFIG_SYS_SDRAM_BASE
+# define CONFIG_SYS_SDRAM_BASE 0
+#endif
+#ifndef CONFIG_SYS_MAX_RAM_SIZE
+# define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024)
+#endif
+#ifndef CONFIG_SYS_MONITOR_BASE
+# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN)
+#endif
+#ifndef CONFIG_SYS_MALLOC_BASE
+# define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
+#endif
+#ifndef CONFIG_SYS_GBL_DATA_SIZE
+# define CONFIG_SYS_GBL_DATA_SIZE (128)
+#endif
+#ifndef CONFIG_SYS_GBL_DATA_ADDR
+# define CONFIG_SYS_GBL_DATA_ADDR (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
+#endif
+#ifndef CONFIG_STACKBASE
+# define CONFIG_STACKBASE (CONFIG_SYS_GBL_DATA_ADDR - 4)
+#endif
+#ifndef CONFIG_SYS_MEMTEST_START
+# define CONFIG_SYS_MEMTEST_START 0
+#endif
+#ifndef CONFIG_SYS_MEMTEST_END
+# define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4)
+#endif
+
+/* Check to make sure everything fits in external RAM */
+#if ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE)
+# error Memory Map does not fit into configuration
+#endif
+
+/* Default/common Blackfin environment settings */
+#ifndef CONFIG_LOADADDR
+# define CONFIG_LOADADDR 0x1000000
+#endif
+#ifndef CONFIG_SYS_LOAD_ADDR
+# define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#endif
+#ifndef CONFIG_SYS_BOOTM_LEN
+# define CONFIG_SYS_BOOTM_LEN 0x4000000
+#endif
+#ifndef CONFIG_SYS_PROMPT
+# define CONFIG_SYS_PROMPT "bfin> "
+#endif
+#ifndef CONFIG_SYS_CBSIZE
+# ifdef CONFIG_CMD_KGDB
+# define CONFIG_SYS_CBSIZE 1024
+# else
+# define CONFIG_SYS_CBSIZE 256
+# endif
+#endif
+#ifndef CONFIG_SYS_BARGSIZE
+# define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#endif
+#ifndef CONFIG_SYS_PBSIZE
+# define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#endif
+#ifndef CONFIG_SYS_MAXARGS
+# define CONFIG_SYS_MAXARGS 16
+#endif
+#if defined(CONFIG_SYS_HZ)
+# if (CONFIG_SYS_HZ != 1000)
+# warning "CONFIG_SYS_HZ must always be 1000"
+# endif
+# undef CONFIG_SYS_HZ
+#endif
+#define CONFIG_SYS_HZ 1000
+#ifndef CONFIG_SYS_BAUDRATE_TABLE
+# define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#endif
#endif
#ifndef __CONFIG_BF518F_EZBRD_H__
#define __CONFIG_BF518F_EZBRD_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF526_EZBRD_H__
#define __CONFIG_BF526_EZBRD_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF527_EZKIT_H__
#define __CONFIG_BF527_EZKIT_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF533_EZKIT_H__
#define __CONFIG_BF533_EZKIT_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF533_STAMP_H__
#define __CONFIG_BF533_STAMP_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF537_MINOTAUR_H__
#define __CONFIG_BF537_MINOTAUR_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
"ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
BOOT_ENV_SETTINGS
-
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF537_PNAV_H__
#define __CONFIG_BF537_PNAV_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF537_SRV1_H__
#define __CONFIG_BF537_SRV1_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
"ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \
BOOT_ENV_SETTINGS
-
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF537_STAMP_H__
#define __CONFIG_BF537_STAMP_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF538F_EZKIT_H__
#define __CONFIG_BF538F_EZKIT_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF548_EZKIT_H__
#define __CONFIG_BF548_EZKIT_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_BF561_EZKIT_H__
#define __CONFIG_BF561_EZKIT_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
-#endif /* __CONFIG_EZKIT561_H__ */
+#endif
#ifndef __CONFIG_BLACKSTAMP_H__
#define __CONFIG_BLACKSTAMP_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
* Debugging: Set these options if you're having problems
#undef CONFIG_CMD_JFFS2
#undef CONFIG_CMD_FLASH
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_CM_BF527_H__
#define __CONFIG_CM_BF527_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_CM_BF533_H__
#define __CONFIG_CM_BF533_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_CM_BF537E_H__
#define __CONFIG_CM_BF537E_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_CM_BF548_H__
#define __CONFIG_CM_BF548_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_CM_BF561_H__
#define __CONFIG_CM_BF561_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
#endif
#ifndef __CONFIG_IBF_DSP561__H__
#define __CONFIG_IBF_DSP561__H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
-
-#endif /* __CONFIG_IBF_DSP561__H__ */
+#endif
#ifndef __CONFIG_TCM_BF537_H__
#define __CONFIG_TCM_BF537_H__
-#include <asm/blackfin-config-pre.h>
+#include <asm/config-pre.h>
/*
*/
#include <configs/bfin_adi_common.h>
-#include <asm/blackfin-config-post.h>
#endif
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