]> git.sur5r.net Git - u-boot/commitdiff
ARM: tegra: Build warning fixes for 64-bit
authorThierry Reding <treding@nvidia.com>
Wed, 22 Jul 2015 21:58:05 +0000 (15:58 -0600)
committerTom Warren <twarren@nvidia.com>
Mon, 27 Jul 2015 22:54:18 +0000 (15:54 -0700)
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, stripped out changes not strictly related to warnings]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/mach-tegra/ap.c
arch/arm/mach-tegra/pinmux-common.c

index 0b94e8aaf9c329a7433217cd72086e594b0550a0..7b89c0107196726561815e2a30611076404b2132 100644 (file)
@@ -131,8 +131,8 @@ static u32 get_odmdata(void)
         * on BCTs for currently supported SoCs, which are locked down.
         * If this changes in new chips, we can revisit this algorithm.
         */
-
-       u32 bct_start, odmdata;
+       unsigned long bct_start;
+       u32 odmdata;
 
        bct_start = readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BCTPTR);
        odmdata = readl(bct_start + BCT_ODMDATA_OFFSET);
index b4a1432afcb1b43f84d802df3679291d7db17fff..5862c4ac3dc6f719d868790657356fc833b7436d 100644 (file)
@@ -78,7 +78,7 @@
        (((hsm) >= PMUX_HSM_DISABLE) && ((hsm) <= PMUX_HSM_ENABLE))
 #endif
 
-#define _R(offset)     (u32 *)(NV_PA_APB_MISC_BASE + (offset))
+#define _R(offset)     (u32 *)((unsigned long)NV_PA_APB_MISC_BASE + (offset))
 
 #if defined(CONFIG_TEGRA20)